SoC Logic Design Engineer

Intel Corporation•Austin, TX

2d•$141,910 - $200,340•Hybrid

About The Position

Join Intel's distinguished team as an SoC Logic Design Engineer. In this role, you will pioneer the development of cutting-edge System-on-Chip (SoC) solutions, contributing to Intel's mission of creating transformative technology that drives global innovation. As a key member of our team, you will have the opportunity to influence the architecture, design, and integration of next-generation SoCs. Your contributions will directly impact Intel's ability to deliver world-class products with optimal performance, power efficiency, and scalability, shaping the future of the semiconductor industry.

Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field and 4+ years of relevant experience OR Master's degree in Electrical Engineering, Computer Engineering, or a related field and 3+ years of relevant experience OR PhD in Electrical Engineering, Computer Engineering, or a related field and 6+ months of experience.
Expertise in RTL development, System Verilog, and SoC logic integration.
Proficiency in microarchitecture definition, logic design, and simulation.
Strong understanding of SoC design methodologies, including timing/power convergence and physical implementation.

Nice To Haves

Hands-on experience with Python, Perl, or other scripting languages.
Familiarity with advanced Front-End RTL Design tools such as Lint, CDC, Synthesis, and Static Timing Analysis (STA).
Experience in validation development, pre-silicon testing, and DFT/DFD tools.
Knowledge of industry-standard IPs, fabrics, and UVM-based verification.

Responsibilities

Develop high-quality logic designs, including Register Transfer Level (RTL) coding and simulations, for innovative SoCs.
Collaborate with architects to define and implement microarchitecture features of SoC blocks.
Integrate and validate Intellectual Property (IP) blocks and subsystems into full-chip SoC designs.
Perform quality checks and optimize designs to meet power, performance, area, and timing objectives, ensuring seamless production readiness.
Review verification plans to confirm design features are thoroughly verified and address any RTL test failures with corrective measures.
Employ secure development practices to mitigate security risks and maintain design integrity.
Work with IP providers to integrate and validate IPs at the SoC level.
Drive quality assurance compliance to enable efficient IP-SoC handoffs.