SoC Hardware (Power Management) Validation Engineer

Microsoft•Hillsboro, OR

4d•$102,100 - $219,200

About The Position

Microsoft’s Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) organization builds infrastructure and foundational technologies that support Microsoft’s online businesses and Azure platform. Within SCHIE, the Compute Silicon & Manufacturing Engineering (CSME) organization designs, develops, manufactures, and packages computer chips, including Azure Cobalt. Its Verification and Validation team supports the planning, quality, delivery, scale, and sustainability of Microsoft cloud hardware. The Compute Silicon & Manufacturing Engineering Cloud Compute Development Organization is seeking a SoC Hardware Power Management Validation Engineer for its post-silicon validation team. This technical individual contributor will validate and debug power-management features across custom silicon projects and collaborate with architecture, design, firmware, verification, system software, and platform teams. The role includes silicon bring-up, feature characterization, workload-based validation, power-performance analysis, and continuous improvement of validation automation and debug capabilities. The position also contributes technical leadership and mentoring and supports delivery of high-quality silicon against performance-per-watt and power-efficiency targets.

Requirements

Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field and at least 1 year of technical engineering experience; or bachelor’s degree in one of these fields or a related field and at least 2 years of technical engineering experience; or equivalent experience.
Ability to meet Microsoft, customer, and/or government security screening requirements, including passing the Microsoft Cloud Background Check upon hire or transfer and every two years thereafter.
Eligibility to access export-controlled information; the successful candidate must provide proof of citizenship, U.S. residency, or other protected status, with citizenship verified by a valid passport or applicable alternative documentation.

Nice To Haves

Proficient communication, collaboration, and teamwork skills, with the ability to lead, grow, and contribute to diverse and inclusive teams.
Experience in verification, logic development, analog validation, or validation tools as part of a CPU, SoC, and/or IP development team.
Leadership skills.
Demonstrated validation expertise in power validation, performance testing, and tuning.
Experience with automation, content creation, or tools and script development.
Ability to develop synthetic SoC validation content for core, coherency, memory, and I/O, for bare-metal and operating-system environments.
Ability to develop sophisticated tools or scripts for SoC validation debug, such as maximum-power analysis, current transients, and register dumps.
Understanding of board-level schematics.
Understanding of system-level software and firmware.
Experience running silicon content on pre-silicon platforms such as emulation or FPGA.
Demonstrated success in hardware/software debug efforts.

Responsibilities

Own post-silicon validation and debug of power-management features across CPU cores, mesh, memory, I/O, package, and platform power domains.
Develop and execute validation strategies for power states, DVFS, idle and active power management, thermal management, performance-per-watt optimization, and system-level power features.
Perform root-cause analysis of silicon, firmware, hardware, and software issues affecting power, performance, stability, and feature readiness.
Define validation requirements, test plans, methodologies, automation frameworks, debug tools, and telemetry solutions.
Collaborate with architecture, design, firmware, verification, system software, and platform teams to support correct implementation of power-management features.
Lead silicon bring-up, feature characterization, workload-based validation, and power-performance correlation across development milestones.
Analyze power, performance, and thermal telemetry to identify bottlenecks, validate design assumptions, and optimize platform efficiency.
Use post-silicon learnings to influence pre-silicon verification strategies, coverage plans, and debug methodologies.
Provide technical leadership, mentoring, and guidance in power-management architecture, validation techniques, and debug methodologies.
Improve validation infrastructure, automation, and debug capabilities to accelerate issue resolution and product quality.
Partner across organizations to deliver high-quality silicon on schedule and meet performance-per-watt and power-efficiency targets.
Foster a collaborative One Microsoft culture through technical excellence, ownership, innovation, and integrity.