SOC Design Verification Engineer

Intel•Fort Collins, CO

11h•Hybrid

About The Position

The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people's digital lives. Come join us and do something wonderful.

Requirements

Bachelors or Masters Degree in Electrical Engineering and/or Computer Engineering and/or Computer Science
1+ years SystemVerilog and UVM experience
2+ years Python for test automation
6+ months C/C++ and scripting proficiency (Perl, Tcl, Shell)
1+ years pre-silicon verification experience
6+ months Linux/Unix and version control (Git, Perforce)
6+ months Regression testing and CI/CD pipelines
6+ months Security verification methodologies

Nice To Haves

Experience with simulation tools (VCS, Xcelium, Questa)
Formal verification tools and coverage analysis
Constrained random and assertion-based verification
Experience x86 SoC or equivalent architectures
AMBA protocols (AXI, AHB, APB) and interconnects- Memory subsystems, cache coherency, power management
High-speed interfaces (PCIe, DDR, USB, Ethernet)

Responsibilities

Performs functional logic verification of an integrated SoC to ensure design will meet specifications.
Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications.
Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs.
Replicates, root causes, and debugs issues in the presilicon environment.
Finds and implements corrective measures to resolve failing tests.
Collaborates and communicates with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural and microarchitectural features.
Documents test plans and drives technical reviews of plans and proofs with design and architecture teams.
Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage.
Maintains and improves existing functional verification infrastructure and methodology.
Absorbs learning from postsilicon on the quality of validation done during presilicon development, updates test plan for missing coverages, and proliferates to future products.