SoC Debug Engineer

Intel Corporation•Austin, TX

1d•$105,650 - $149,150•Hybrid

About The Position

As a SoC Debug Engineer, you will help ensure the reliability and performance of Intel products by debugging systems and subsystems, isolating failures, resolving issues, and improving debug processes. The role is part of Intel’s Data Center Group, which develops scalable technologies for data centers, high-performance computing, cloud services, and enterprise systems. The position uses a hybrid work model, with time split between an assigned Intel site and off-site work. You will work with design, validation, and manufacturing teams to improve SoC debug readiness and product characterization. The role requires a bachelor’s degree in a relevant engineering field and at least three years of hands-on experience in SoC debugging and related design, architecture, firmware, software, tools, and scripting. A master’s degree and interest in improving debug methodologies are preferred.

Requirements

Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field.
At least 3 years of hands-on experience in SoC debugging, which may be gained through internships, academic projects, coursework, or hands-on training.
Experience with SoC design, architecture, firmware, and software debugging techniques.
Experience with debug tools, design-for-debug technologies, and scripting languages.
Strong analytical and problem-solving skills with attention to detail.
Effective communication skills and willingness to work across diverse technical teams.

Nice To Haves

Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
Interest in innovation and continuous improvement in debugging methodologies and workflows.

Responsibilities

Perform detailed, low-level debugging of SoC designs and subsystems across Intel products.
Conduct root cause analysis of triage failures and marginality issues to support system-wide reliability.
Define, develop, and implement debug techniques, tools, and scripts to improve debug efficiency.
Formulate system-level debug requirements and strategies aligned with architectural compatibility.
Drive bench testing for new product features and functionality and develop improved characterization methodologies.
Collaborate with design and validation teams and manufacturing factories to track SoC debug readiness and optimize workflows.
Improve debugging practices through design-for-debug techniques and workflows.