Senior SoC Debug Engineer

Qualcomm•San Diego, CA
•$121,800 - $182,600

About The Position

Qualcomm Technologies, Inc.'s Silicon Validation team is part of the central SoC digital hardware organization and is responsible for overall SoC silicon quality. The team works closely with architects, designers, verification engineers, software engineers, and customers. The Senior SoC Debug Engineer supports pre-silicon and post-silicon bring-up and debugging at the embedded platform level, develops approaches to speed platform-level debug and isolate failing system components, and creates debug strategies and plans to help partners triage failures, including PVT and marginality issues. The role also supports generative AI automation and enablement for the debug flow.

Requirements

  • 5 to 8 years of experience with pre-silicon and post-silicon enabling, bring-up, and failure analysis at the embedded platform level.
  • RTL inspection skills and understanding of basic RTL.
  • Knowledge and experience with generative AI for automating the debug flow.
  • Experience supporting, developing, and implementing solutions for faster platform-level debug, including isolating failing system components.
  • Experience creating debug strategies and plans for partners to triage failures and isolate components, including PVT and marginality issues.
  • Experience debugging low-level software and hardware issues.
  • Experience with debug tools, including JTAG.
  • Experience using lab equipment such as logic analyzers, oscilloscopes, and signal generators.
  • Bachelor's degree in Science, Engineering, or a related field and 2+ years of ASIC design, verification, validation, integration, or related work experience; or a master's degree in Science, Engineering, or a related field and 1+ year of related work experience; or a PhD in Science, Engineering, or a related field.

Nice To Haves

  • Bachelor's degree in Computer Engineering and/or Electrical Engineering is preferred.

Responsibilities

  • Bring up, debug, and analyze failures at the embedded platform level during pre-silicon and post-silicon phases.
  • Support, develop, and implement solutions for faster platform-level debug, including isolating failing system components.
  • Create debug strategies and plans for partners to triage failures more rapidly and isolate specific components, including PVT and marginality issues.
  • Use generative AI to automate and enable the debug flow.
  • Debug low-level software and hardware issues.
  • Use debug tools, including JTAG, and lab equipment such as logic analyzers, oscilloscopes, and signal generators.

Benefits

  • Competitive annual discretionary bonus program.
  • Opportunity for annual RSU grants, except for employees on sales-incentive plans.
  • Competitive benefits package designed to support employees at work, at home, and at play.
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