SLD Avionics FPGA Engineer III - Lunar Permanence

BLUE ORIGIN•Denver, WA

1d•$119,814 - $182,988•Onsite

About The Position

This role is part of the Lunar Permanence business unit, which develops Blue Origin’s Blue Moon landers and related products. To further Blue Origin's mission of millions of people living and working in space for the benefit of Earth, we are building sustainable infrastructure for our transport of crew and cargo from Earth to the lunar surface. As part of a hardworking team of systems engineers, hardware engineers, software engineers, and program leaders, you will play a critical role in the development, implementation, verification, and testing of firmware for our FPGA based designs, which must operate in harsh environments, under demanding conditions onboard our Avionics components in various spaceflight systems. You will be instrumental in developing firmware requirements in coordination with systems engineering, hardware engineering, software engineering and subsystem owners. You will develop FPGA design and verification utilizing hardware description languages. You will be responsible for the development of tests and the associated documentation. You will participate in design reviews. You will work directly with NASA and our National Team Partners as part of the Human Landing System (HLS) Sustaining Lunar Development (SLD) program. You will play a key role in developing the Lunar Transportation system that will return humans to the Moon and extend human presence permanently beyond the bounds of Earth. We are looking for someone to apply their technical expertise, leadership skills, and commitment to quality to positively impact safe human spaceflight. Passion for our mission and vision is required!

Requirements

Bachelor's/Master’s degree in computer engineering, electrical engineering, computer science, mathematics, physics, aerospace, or related fields.
5+ years of FPGA/ASIC design and verification work experience.
Proficient in writing RTL using Verilog/SystemVerilog/VHDL (SystemVerilog desired).
Strong understanding of FPGA design concepts, CDC, constraint definition, STA, and timing closure.
Proficient with FPGA development tools such as Xilinx Vivado, Intel Quartus, Lattice Diamond/Radiant, or Microchip Libero.
Proficient with ModelSim/QuestaSim or equivalent simulators.
Proficient in writing testbenches utilizing techniques such as UVM/OVM, SV Assertion, and/or functional/code coverage analysis.
Debugging failures in simulation to root cause problems.
Ability to work effectively in a team environment and to communicate technical information clearly and concisely.
Must be a U.S. citizen or national, U.S. permanent resident (current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.

Nice To Haves

8+ years of FPGA/ASIC development experience.
Proficient with scripting languages like Perl or Python or Tcl is a plus.
Proficient with revision control systems, such as Git/SVN.
Experience with common on-chip bus protocols such as AMBA (AXI, AHB, APB) is a plus.
Experience with IEEE 802.3, XAUI, JESD204, I2C, SPI interfaces.
Working knowledge of NPR 7150.2, DO-254, or other safety-critical software standard.

Responsibilities

Develop, implement, verify, and test firmware for FPGA based designs.
Develop firmware requirements in coordination with systems engineering, hardware engineering, software engineering and subsystem owners.
Develop FPGA design and verification utilizing hardware description languages.
Develop tests and associated documentation.
Participate in design reviews.