Silicon Validation Intern, BS - Summer 2027

Marvell Technology•Santa Clara, CA
•$28 - $56

About The Position

The Silicon Validation Intern will join Marvell’s Rack Scale Switch Chip Validation team, which validates and delivers high-performance switching silicon and system-level solutions for AI and cloud data center racks. Working alongside experienced engineers, the intern will support post-silicon validation and contribute to day-to-day engineering tasks, including lab-based silicon bring-up, emulation and verification testing, debugging silicon and hardware issues, troubleshooting switch performance and efficiency, analyzing high-speed signal and link data, and automating workflows with scripts. The work supports the delivery of reliable, high-bandwidth, low-latency switch products for data center networking. The role is intended for a student currently pursuing a bachelor’s degree in a relevant engineering or computing field, with an expected graduation date between Fall 2027 and Summer 2028. The internship offers exposure to validation test planning and execution, lab equipment and diagnostics, high-speed interfaces, and engineering documentation and reporting.

Requirements

  • Currently pursuing a bachelor’s degree in electrical engineering, computer engineering, computer science, or a related field, with an expected graduation date between Fall 2027 and Summer 2028.
  • Foundational understanding of digital logic, computer architecture, and high-speed I/O concepts such as SerDes and PCIe or Ethernet protocols.
  • Basic hands-on lab experience through coursework, research, or projects, such as hardware bring-up, testing, and debugging.
  • Familiarity with common lab equipment such as oscilloscopes, logic analyzers, or BERTs.
  • Programming or scripting experience in Python, Perl, or a similar language.
  • Strong analytical, problem-solving, and communication skills, with a willingness to learn.

Nice To Haves

  • Coursework or project experience with PCIe, Ethernet, or other high-speed interfaces.
  • Exposure to the physical and protocol layers of high-speed interfaces, for example PHY, PCS, or MAC.
  • Experience with emulation, simulation, or verification environments.
  • Ability to read board schematics and layouts.
  • Familiarity with signal integrity concepts such as eye diagrams, jitter, and BER.

Responsibilities

  • Support post-silicon validation of high-speed switch silicon under the guidance of senior engineers.
  • Assist in developing, documenting, and executing test plans and test cases for switch chip validation.
  • Support lab-based silicon bring-up and run unit tests on hardware and firmware functionality, including emulation and verification environments.
  • Help collect and analyze high-speed signal and link data, such as eye diagrams, jitter, and BER, using lab test equipment.
  • Assist in debugging silicon and hardware issues and troubleshooting switch performance and efficiency.
  • Use diagnostics, software tools, oscilloscopes, and protocol analyzers to help isolate the root cause of failing tests.
  • Write and maintain scripts, for example in Python, to automate test execution, data collection, and result reporting.
  • Document test results, findings, and debug progress, and present them to the team.

Benefits

  • Medical coverage
  • Dental coverage
  • Vision coverage
  • Perks and discounts
  • Mental health resources
  • Paid holidays
© 2026 Teal Labs, Inc
Privacy PolicyTerms of Service