Silicon Validation & FPGA Engineer

Team Red Dog•Mountain View, CA

2d•Onsite

About The Position

Team Red Dog is hiring a Silicon Validation & FPGA Engineer for our client, a next-generation cloud platform company and AI-driven technology organization. This highly technical, hands-on role will develop and validate the silicon powering Azure cloud services and AI workloads, with a focus on SoC validation, FPGA prototyping, embedded C/C++ development, firmware-style testing, and post-silicon bring-up. You will build FPGA platforms and custom RTL, develop Python tooling and low-level test content, and debug complex silicon and hardware issues in the lab alongside design, firmware, architecture, hardware, validation, and security teams. Your work will directly enable successful silicon bring-up and help deliver reliable custom hardware at the foundation of large-scale cloud and AI infrastructure.

Requirements

Bachelor’s degree in Electronics and Communication Engineering, Computer Engineering, or a related discipline.
5–7 years of relevant engineering experience.
Strong experience developing C/C++ test content for subsystem and SoC verification, including bare-metal and firmware-style testing.
Working knowledge of SystemVerilog testbenches and verification environments.
Experience bringing up and maintaining FPGA prototyping or emulation platforms such as HAPS or Xilinx.
Hands-on hardware debugging experience with JTAG debuggers, logic analyzers, oscilloscopes, and multimeters.
Experience with post-silicon bring-up and validation, including silicon test execution and debugging boot, connectivity, and platform issues.
Proficiency in Python or a comparable scripting language such as Perl or Ruby for test automation, build flows, and log or data parsing.
Strong knowledge of verification principles, testbench architecture, stimulus generation, and complex design debugging.
Experience with low-level and embedded software, including assembly, startup code, linker scripts, and Makefile-based build flows.
Familiarity with industry protocols including AMBA (AXI/AHB/APB), JTAG, SPI, I2C/I3C, and USB.
Strong understanding of silicon and/or computer architecture.
Demonstrated ability to collaborate effectively across architecture, design, firmware, hardware, and validation teams.

Nice To Haves

Deep, hands-on experience across the hardware/software boundary rather than specializing exclusively in one area.
Personally developed C/C++ firmware-style tests, brought up FPGA or emulation platforms, debugged real silicon in a lab environment, and used Python to automate or extend engineering workflows.
Ability to independently investigate complex failures from test through root cause, understand SoC and computer architecture, and communicate effectively with architecture, design, firmware, hardware, security, and validation teams.
Experience maintaining shared FPGA platforms and delivering reliable tooling that other engineering teams depend on.

Responsibilities

Develop C and C++ test content, low-level drivers, and custom firmware at the subsystem and SoC levels, including self-checking tests running on embedded processors.
Extend compile and build flows to support custom firmware-style tests.
Serve as a technical owner for FPGA prototyping platforms such as HAPS or Xilinx, creating board images and bit files and maintaining stable platforms as silicon designs evolve.
Design custom FPGA RTL to support protocol interfaces, feature enablement, firmware development, and validation.
Develop and extend Python tooling used to interface with FPGA platforms and automate engineering workflows.
Debug FPGA and post-silicon issues using JTAG debuggers, logic analyzers, oscilloscopes, multimeters, and other lab equipment.
Drive post-silicon bring-up and validation, executing validation suites on first silicon and meeting established bring-up exit criteria.
Diagnose JTAG failures, UART connectivity issues, boot failures, and other complex platform problems in partnership with design, firmware, hardware, validation, and security teams.
Root-cause failing post-silicon tests, analyze scan dumps, resolve low-level boot ROM and built-in self-test issues, and drive technical problems through closure.