About The Position

The Post-Silicon Validation team bring up and validate the high-speed IO and memory subsystems inside SambaNova's DataScale platform, including PCIe, Ethernet, HBM, CXL, and UCIe interfaces. The team owns the path from first silicon power-on through field deployment: characterization, stress testing, performance validation, and root-causing issues that span silicon, board, and software. We work directly with design, firmware, verification, and system engineering to keep bring-up on schedule and sign off on validation before product releases. SambaNova is seeking a Principal Engineer to own post-silicon bring-up, debug, and validation of high-speed IO and memory subsystems within the DataScale® platform. This role is central to delivering reliable, high-performance AI systems at scale. You will lead system-level debug across silicon, board, and software layers, driving issues to root cause from first silicon through field deployment. This is a hands-on role for an engineer with deep expertise in high-speed interfaces and hardware debug, who can operate in ambiguity and execute with high ownership.

Requirements

  • M.S. in Electrical Engineering, Computer Science, or a related field
  • 7+ years of experience in post-silicon validation or system bring-up
  • Experience with two or more high-speed IO or memory protocols such as PCIe, Ethernet, HBM, CXL, or UCIe
  • Proven ability to lead cross-functional debug efforts to root cause and closure
  • Strong analytical skills for test development and data analysis
  • Proficiency in scripting such as Python and bash
  • Clear and effective communicator with a proactive, collaborative approach to problem-solving

Nice To Haves

  • Deep understanding of high-speed SerDes training and adaptation
  • Experience with mixed-signal IO design and validation
  • Hands-on lab experience with oscilloscopes, protocol analyzers, and BERTs
  • Experience with optical interconnect
  • Ability to read and debug C/C++

Responsibilities

  • Own post-silicon bring-up and validation of high-speed IO and memory subsystems, spanning characterization, functional validation, stress testing, and performance analysis
  • Establish power-on readiness ahead of first silicon, including debug infrastructure, tooling, and contingency planning
  • Lead system-level debug to root cause complex issues spanning silicon, board, and software layers
  • Drive resolution with design, firmware, verification, and system teams to close issues and keep bring-up on schedule
  • Partner with system and customer engineering teams on product validation, deployment, and RMA debug
  • Own validation sign-off for product release against stability, performance, and field reliability targets
  • Review SoC and board design and SI/PI analysis through a post-silicon debug and deployment lens
  • Contribute to pre-silicon verification and emulation to improve bring-up efficiency and coverage
  • Build scripts and tooling that automate validation, debug, and data analysis, and scale test coverage across systems
  • Advance post-silicon validation methodology and debug infrastructure across programs

Benefits

  • Competitive total rewards package, including base salary, equity, and benefits
  • 95% premium coverage for employee medical insurance
  • 77% premium coverage for dependents
  • Health Savings Account (HSA) with employer contribution
  • Dental insurance
  • Vision insurance
  • Short-term Disability insurance
  • Long-term Disability insurance
  • Basic Life insurance
  • Voluntary Life insurance
  • Accidental Death & Dismemberment (AD&D) insurance
  • Flexible Spending Account (FSA) options (Health Care, Limited Purpose, Dependent Care)
  • Headspace subscription
  • Gympass+ membership with access to physical gyms
  • One Medical membership
  • Counseling services with an Employee Assistance Program
© 2026 Teal Labs, Inc
Privacy PolicyTerms of Service