Silicon Design and Validation Engineer

Broadcom•San Jose, CA

About The Position

Broadcom is looking for a Silicon Design and Validation Engineer. In this highly visible role, you will perform design, verification and validation of analog and mixed-signal high-speed building blocks. You will collaborate with cross functional teams to launch ASIC products for data center networking.

Requirements

M.Sc. or PhD. in Electrical Engineering or Computer Engineering with 6+ years of experience in analog and mixed signal IP design, verification and validation for high-speed data converters, SerDes and data center networking and optical I/O.
Experience with design, validation and verification of analog front-end circuits, Trans-Impedance Amplifiers(TIA), PLLs, VCOs and clocking circuitry.
Knowledge of development methodologies, design flows including EDA integration, foundry PDK and associated collaterals.
Deep understanding of signal integrity and power integrity for high-speed designs and experience with PI and SI measurements for correlation and debugging purposes.
Ability to work with Matlab or Python.
Experience with measurement equipment such as DCO, oversampling/real time scopes, and network analyzers.
System level knowledge and deep understanding of current generation and next generation of optical and electrical high-speed I/Os
Understanding of high-speed optical and electrical interconnect architectures and IEEE standards.
Strong analytical thinking and problem-solving skills with excellent attention to details.

Nice To Haves

Experience with RF and high speed probing is a plus.
It is a plus if the candidate has a good understanding of advanced packaging (2.5D / 3D) architectures.
Strong written and verbal communication skills, with the specific ability to speak to various technical and management levels.
Proactive, collaborative and creative approach to innovation, technical development and consensus facilitation to influence optimal project results.
Excellent time and task management, and interpersonal skills.
Willingness to travel when required.

Responsibilities

Perform design, verification and validation of analog and mixed-signal high-speed building blocks.
Collaborate with cross functional teams to launch ASIC products for data center networking.
Experience with bench test debug and validation of clock generation and timing IPs, data converters, TIAs, modulator drivers, clock and data recovery (CDR) and SerDes.
Validation, verification and characterization of various control loops such as PLLs, LDOs.
Experience in test development, debug, and reporting.
Experience in assessing design bugs and recommending workarounds.

Benefits

Discretionary annual bonus
Competitive new hire equity grant
Annual equity awards
Medical, dental and vision plans
401(K) participation including company matching
Employee Stock Purchase Program (ESPP)
Employee Assistance Program (EAP)
Company paid holidays
Paid sick leave
Vacation time
Company follows all applicable laws for Paid Family Leave and other leaves of absence.