Signal Integrity Engineer

Lightmatter•Mountain View, CA

3h•$157,000 - $176,000•Hybrid

About The Position

Lightmatter is leading the revolution in AI data center infrastructure, enabling the next giant leaps in human progress. The company invented the world’s first 3D-stacked photonics engine, Passage™, capable of connecting thousands to millions of processors at the speed of light in extreme-scale data centers for the most advanced AI and HPC workloads. Lightmatter raised $400 million in its Series D round, reaching a valuation of $4.4 billion. We will continue to accelerate the development of data center photonics and grow every department at Lightmatter! If you're passionate about tackling complex challenges, making an impact, and being an expert in your craft, join our team of brilliant scientists, engineers, and accomplished industry leaders. Lightmatter is (re)inventing the future of computing with light! About This Role We are looking for a Signal Integrity engineer to drive the next generation products from concept to development. You will be part of the Signal Integrity, Power Integrity and Packaging team, tasked with influencing the package and system architecture, design, and analysis through lab bring-up to meet the product's signal integrity requirements. This position offers a unique opportunity to solve complex interactions across digital, analog and photonics domains while meeting stringent signal integrity goals.

Requirements

B.S. or M.S. degree in Electrical Engineering or relevant field with a minimum of 5 years of related experience.
Robust professional and specialized knowledge in signal integrity analysis for high-speed interfaces.
Proficiency in using simulation and analysis tools for signal integrity, including Ansys Siwave, HFSS & Keysight ADS.
Strong understanding of transmission line theory, impedance matching, and equalization techniques.
Knowledge of signaling protocols for high-speed interfaces, including SerDes, UCIE, etc.
Ensure robust signal integrity and timing performance for lower-speed critical interfaces and control buses, such as system clocks, SPI, and I2C.
Experience with PCB design and layout considerations for high-speed interfaces (layer stack-up, routing, and via design).
Proficiency in using lab equipment for signal measurement and characterization.
Ability to write scripts to automate the simulation flow (Python, JavaScript, Ocean scripts, or SKILL).

Nice To Haves

Strong problem-solving and debugging skills for signal integrity-related issues.
Understanding of CMOS process technologies and their impact on signal integrity.
Demonstrated ability to network with new stakeholders and collaborate effectively across teams.
Ability to work independently, utilizing best judgment to select appropriate courses of action, with work reviewed at critical checkpoints.

Responsibilities

Plan and execute moderate to complex signal integrity engineering tasks for high-speed interfaces such as PCIe, UCIe and SerDes.
Analyze high-speed channel characteristics including S-parameters, insertion loss, return loss, and crosstalk to evaluate and optimize signal quality.
Perform signal integrity analysis and simulations (eye diagram analysis, jitter analysis, equalization) by adapting existing practices and procedures to evaluate design choices.
Collaborate with cross-functional teams including hardware designers and PCB layout engineers working on individual and team projects that impact the broader engineering function.
Assist hardware designers in ensuring proper impedance matching, termination, and routing techniques, advising peers on complex signal integrity matters.
Perform detailed signal integrity measurements and characterization using lab equipment (oscilloscopes, network analyzers, TDRs, VNA) to validate design performance and troubleshoot ill-defined issues.
Participate in signal integrity design reviews, presenting findings and suggesting creative variations in approach to ensure adherence to design specifications.
Document and communicate signal integrity analysis results and design guidelines to stakeholders, adapting communication style depending on the audience.