Si Photonic Foundry Component Engineer

Cisco•Allentown, NJ

About The Position

Cisco is seeking an accomplished Engineer to join the Optics group within its Component Quality and Technology (CQT) organization. The role drives development and mass production of next-generation Silicon Photonics (SiPh) integrated circuits and serves as the primary interface between Cisco engineering and high-volume manufacturing foundries. The engineer owns end-to-end process integration, device qualification, and bring-up of Si Photonic ICs, translating design intent into manufacturable, reliable, and testable solutions for global networking.

Requirements

PhD or MS in Electrical Engineering, Optics, Photonics, or a related field, with 5+ years of industry experience in chip development, foundry management, and process qualification.
Direct experience working with external foundries on process bring-up and qualification in high-volume production environments.
Knowledge of design-for-manufacturing (DFM), design-for-reliability (DFR), and design-for-test (DFT) principles applied to fabrication, integration, and characterization of PIC and EIC devices.
Proficiency with IC design tools including Cadence Virtuoso, Synopsys, and Klayout.
Hands-on experience with wafer-level testing, lab automation, and bring-up and debugging of photonic and electronic ICs in high-volume production environments.

Nice To Haves

Familiarity or hands-on experience with near-package optics (NPO) or co-packaged optics (CPO) architectures.
Prior experience in volume manufacturing within a silicon photonics foundry environment.
Proficiency with advanced photonic and electronic IC design simulation tools, such as ANSYS Lumerical.
Demonstrated ability to contribute to and lead projects within matrixed, geographically distributed technical teams.
Proven ability to lead cross-functional technical teams and manage complex vendor/foundry relationships, including process roadmap negotiations and qualification milestone ownership.

Responsibilities

Manage the end-to-end PIC tape-out lifecycle, from device-level design recommendations and PDK engagement through DRC sign-off, process integration, and foundry qualification.
Develop, modify, and optimize photonic process flows for SiPh platforms using CMOS fabrication capabilities, with the goal of robust process windows and high yield.
Lead development and validation of optical and electrical Process Control Monitors (PCMs) and automated test plans for passive and active PIC components.
Execute root-cause analysis and Design of Experiments (DOE) to address failure mechanisms in discrete and integrated components.
Apply design-for-reliability (DFR) frameworks to anticipate and eliminate failure modes early in the development cycle and drive qualification.

Benefits

Medical, dental, and vision insurance for eligible U.S. employees.
401(k) plan with a Cisco matching contribution for eligible U.S. employees.
Paid parental leave.
Short- and long-term disability coverage and basic life insurance.
Paid holidays, a floating holiday for non-exempt employees, a birthday day off, and a paid year-end holiday shutdown.
Paid vacation or flexible vacation time off, depending on employee classification.
Sick time off, with unused sick time carryover subject to the described limits.
Additional paid time away may be requested for critical or emergency family issues.
Optional paid volunteer days.
Annual bonuses for eligible non-sales employees, subject to Cisco policies.
Employees may be eligible for Cisco restricted stock unit grants, subject to vesting conditions.