AMD’s SerDes Technology Group develops high-performance electrical and optical transceivers in advanced CMOS PDKs. The group is seeking an expert in analog/mixed-signal circuit design and transceiver micro-architecture, with a strong background in advanced ultra-high-speed electrical and/or optical PHY design and architecture. The successful candidate will be a self-starter who collaborates with functional teams and customers to drive projects to completion. The role leads transceiver micro-architecture definition, modeling, simulation, implementation, and verification, including transmitter and receiver analog front-end blocks, clocking circuits, DSPs, CDR, adaptation and calibration loops, firmware loops, and system-level interfaces. The engineer will work with pre-tapeout verification teams on silicon design sign-off and with post-silicon validation teams to bring up silicon and analyze volume productization data. The position is located in San Jose, California, and is not eligible for visa sponsorship. AMD may use artificial intelligence to help screen, assess, or select applicants. This posting is for an existing vacancy.
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Job Type
Full-time
Career Level
Senior