Senior VHDL RTL Digital Logic Engineer

Schweitzer Engineering Laboratories (SEL)•Pullman, WA

9d•$136,000 - $201,000•Onsite

About The Position

Schweitzer Engineering Laboratories, Inc. (SEL) designs, manufactures, and installs world-class products and solutions for use in critical infrastructure, making electric power safer, more reliable, and more economical. SEL is hiring a Senior Engineer with a focus in VHDL Register-Transfer Level (RTL) Digital Logic design for our R&D Communications product group. In this role, you will develop and support our Ethernet Security Gateways, Satellite Synchronized Network Clocks, Ethernet Switches, and other communication products.

Requirements

B.S. degree in Electrical Engineering, related discipline, or equivalent combination of education and experience
8+ years of combined experience in at least 2 of the following areas: RTL Digital Design with FPGAs using VHDL/Verilog, Xilinx, Intel FPGA (Altera), Microchip (Microsemi/Actel), Lattice Semiconductor Tools, Firmware Design with FPGA SOCs/Microprocessors using C/C++, Simulation, Synthesis and Timing Analysis of Digital Logic, Functional verification of RTL Digital Logic
Ability to work cooperatively in a team environment
Ability to rapidly learn new skills and assume new responsibilities
Ability to mentor others
Strong writing, technical documentation and speaking
Background check results satisfactory to SEL
Negative drug test result(s)

Nice To Haves

Supervisory experience or training
Strong project management knowledge and skills
Passionate about designing RTL digital logic for FPGAs.
Enjoy solving difficult problems with efficient and creative solutions.
Experience in both RTL, hardware and firmware development practices.
Knowledgeable in networking/Ethernet (IEEE 802.3) and precise timing technologies such as PTP (IEEE 1588) and IRIG-B.
Want a career making electric power safer, more reliable, and more economical.

Responsibilities

Serving as technical lead on complex VHDL RTL digital logic projects.
Creating and maintaining internal RTL design documentation.
Writing test plans and developing test harnesses/stimulus for RTL functional verification.
Preparing design and system level specifications.
Participating or moderating peer reviews of designs, documentation and test plans.
Providing and maintaining accurate project plans and labor estimates.
Working closely with product managers on new product concepts and enhancements.
Engaging with cross-discipline teams to deliver world-class products for critical infrastructure.