Senior Verification Engineer

Microsoft•Redmond, WA

About The Position

Microsoft Azure is building the fastest network in public cloud. The Senior Verification Engineer will work in Azure Core on cutting-edge technology for cloud services reaching thousands of customers through millions of servers. The role applies verification expertise to complex IP, contributes to next-generation cloud server and application IP development, and helps shape verification across the organization. It involves working collaboratively in a fast-paced environment, leading small teams, and making an impact across teams and geographies. The role includes researching tools and making make-versus-buy recommendations; developing product designs and technical solutions to complex quality and design challenges; cross-checking silicon chip architecture; using performance instrumentation and writing performance simulators; creating and executing complex test cases and plans; and developing prototype components to identify complex issues. The engineer will also prepare project schedules and resource plans, identify and communicate project risks and progress, develop and coordinate training materials, and write device specification sheets.

Requirements

  • Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field and 3+ years of technical engineering experience; or bachelor's degree in one of these fields and 5+ years of technical engineering experience; or equivalent experience.
  • Ability to meet Microsoft, customer, and/or government security screening requirements, including passing the Microsoft Cloud Background Check upon hire or transfer and every two years thereafter.

Nice To Haves

  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or a related field and 3+ years of technical engineering experience; or master's degree in one of these fields and 6+ years of technical engineering experience; or bachelor's degree in one of these fields and 8+ years of technical engineering experience; or equivalent experience.
  • 4+ years of experience in UVM (Universal Verification Methodology) and SystemVerilog.
  • Experience with Git for revision control.
  • Experience with scripting languages such as Python, Perl, Shell, or related technologies.
  • Knowledge of IP, subsystem, and/or full-chip verification workflows or ASICs/FPGAs.

Responsibilities

  • Research and identify tools to improve products; provide make-versus-buy recommendations and create complex product designs.
  • Develop and implement technical solutions to complex quality and design challenges.
  • Cross-check silicon chip architecture, use performance instrumentation, and write performance simulators.
  • Write complex test cases and execute test plans for complex features or products; create external testing supplier plans.
  • Develop advanced prototype components to identify complex problems across a range of features.
  • Create project implementation schedules and help determine hardware engineering resources for complex features or products.
  • Identify significant project risks and communicate progress to internal and external teams.
  • Develop and review training materials and coordinate training.
  • Write device specification sheets and interpret complex details required to design hardware features.
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