Senior Technical Program Manager, Chip Tools

NVIDIA

22h•$200,000 - $322,000•Hybrid

About The Position

NVIDIA's chips power everything from AI supercomputers to autonomous vehicles - and the internal tools our hardware engineers rely on are critical path to making that happen. When dependencies aren't managed, chip schedules slip. When infrastructure isn't ready for the next generation, the whole development cycle suffers. As TPM for Chip Tools, you'll shape how this space operates - driving dependency management, tool readiness, and roadmap alignment across the chip development lifecycle. You'll build the processes and visibility that stakeholders depend on, and grow the scope of your impact as NVIDIA continues to scale. You'll start with our chip fuse and programming infrastructure, and expand across the full Chip Tools portfolio. This is a role for someone who wants to own something important and make it excellent. Hardware Infrastructure serves as the foundational platform for silicon development. We build and operate the systems, environments, and tools that enable hardware engineers to design, simulate, validate, and tape out chips. In addition, we support software teams specifically through our source control platforms, enabling development of new products. Our mission is to accelerate engineering velocity while maintaining the performance, efficiency, and reliability required to deliver world-class silicon, while ensuring seamless collaboration where hardware and software development intersect.

Requirements

BS or MS in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field (or equivalent experience).
12+ years of technical program management experience, ideally in hardware, chip development, or engineering infrastructure environments.
Deep familiarity with the hardware development lifecycle - you understand how chips get designed, verified, and manufactured, and where tools are critical path.
Proven ability to manage complex, multi-stakeholder programs with many interdependencies in a fast-moving organization.
Strong instincts for dependency management: you can build a dependency graph, read it for risk, and drive mitigations before they become blockers.
Experience owning tool or infrastructure reliability programs - you know what good uptime, incident management, and SLO frameworks look like.
Clear and direct communicator: you can translate technical complexity into crisp executive summaries and credibly partner with both engineers and senior leadership.
Data-driven approach to program management - you instrument what you own and use data to bring awareness, prioritize and demonstrate progress.

Nice To Haves

Direct experience with chip fusing, programming, or test infrastructure tools in a semiconductor company.
Background owning internal developer tooling or platform engineering programs at scale.
Familiarity with NVIDIA's chip development process, or with comparable processes at a leading semiconductor company.
Experience building program management frameworks from the ground up - not just inheriting mature programs, but establishing structure in ambiguous environments.
Track record of growing a TPM scope horizontally: starting with one product or tool and expanding ownership across a portfolio.

Responsibilities

Own end-to-end program management for Chip Tools, beginning with Fuse, ensuring reliability, uptime, and performance meet the needs of hardware engineering teams across the chip development lifecycle.
Drive tool health initiatives: define SLOs, track incidents, lead root cause analysis, and deliver on improvement roadmaps that reduce friction and prevent recurrence.
Build and maintain a dependency map across Chip Tools -understanding upstream and downstream relationships to surface risk, handle conflicts, and ensure alignment with the chip roadmap.
Partner with HW engineering leads to translate the chip development roadmap into tool readiness requirements; proactively identify gaps and mobilize engineering resources to close them.
Facilitate cross-team coordination across tool developers, infrastructure teams, and HW users -running structured program reviews, tracking action items, and holding teams accountable to commitments.
Develop and maintain dashboards and reporting mechanisms to give leadership and customers real-time insight into tool health, open risks, and delivery status.
Find opportunities to evolve Chip Tools from reactive support into a proactive, system-focused operating model - and build the processes to get there.
Onboard new tools into the Chip Tools portfolio as the scope expands beyond Fuse, establishing consistent standards for program management, change control, and incident response.