About The Position

As a Senior Staff Engineer Physical Design in our Research & Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life. Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener.

Requirements

  • Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 10+ years of related professional experience
  • Strong understanding of ASIC design flows, from RTL to GDSII
  • Knowledge and hands-on experience with STA methodologies and implementation
  • Strong understanding of timing constraint development for hierarchical designs, timing ECO creation and final timing signoff
  • Excellent problem-solving skills, attention to detail, and ability to analyze and debug complex issues

Responsibilities

  • Ability to work on the entire physical design flow of complex SoC designs
  • Perform static timing analysis using industry-standard tools (i.e., PrimeTime)
  • Collaborate with Design, Architecture, DFT, DV, and Physical Design teams to understand design concepts and requirements, analyze timing complexities, and develop constraints for STA
  • Develop and validate timing constraints
  • Own and contribute to any physical design-related tasks like timing ECOs for blocks and SoCs, developing custom scripts to create histograms, stack flow management, custom routes, etc
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