Senior Staff Analog Engineer

Renesas Electronics•Plano, TX

About The Position

Renesas is seeking a Senior Staff Analog Engineer to guide the architectural evolution of its PMIC and mixed-signal product lines. The role spans the development lifecycle, from early customer collaboration and specification through design, simulation, silicon verification, and production readiness. The engineer will serve as a technical authority, mentor and support the design team, contribute to product roadmaps, and improve engineering methodologies. The position involves collaboration with multicultural teams and customers, as well as occasional international travel at short notice.

Requirements

  • At least 8 to 10 years of experience in power management.
  • A proven record of acting as a technical project lead on complex ICs within the last four years.
  • A degree-level qualification in Electronics Engineering or a related discipline.
  • In-depth knowledge of CMOS power management circuits, organizational business objectives, and current market trends.
  • Ability to drive engineering initiatives and process improvements while delivering high-quality results under tight schedule pressure.
  • Exceptional communication and presentation skills, including the ability to convey complex technical concepts to multicultural teams and external customers.
  • Ability to work independently as a technical lead while fostering collaboration as a role model and mentor.
  • High cross-cultural sensitivity and flexibility to undertake occasional international travel at short notice.

Responsibilities

  • Lead the full development lifecycle of major analog and mixed-signal blocks and top-level PMIC products, from initial specification through design, simulation, and silicon verification.
  • Act as a global technical authority and primary point of contact, provide architectural recommendations, and mentor engineers.
  • Collaborate directly with customers to define system requirements and develop solutions that meet performance, area, and power constraints.
  • Oversee high-level verification planning, DFT strategy, and lab evaluation with applications and test engineering teams to ensure production readiness.
  • Identify and implement company-wide improvements in engineering methodologies, policies, and strategic initiatives.
  • Support roadmap planning and align technical advice with external market trends and evolving CMOS process technologies.

Benefits

  • Competitive benefits package alongside salary; further information will be provided during the hiring process.
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