Senior Specialist, Electrical Engineer- Mixed-Signal DSP Hardware Engineer

L3Harris Technologies•San Diego, CA

21d•$106,500 - $197,500

About The Position

L3Harris is seeking a Senior Hardware Engineer to develop mixed-signal, high-speed digital, and DSP-oriented hardware for Tracking, Telemetry, and Command products used in airborne and space-based electronic systems. The role covers architecture, detailed design, verification, troubleshooting, integration, and production support for converter-based receiver, transmitter, direct-conversion, and modem subsystems. These designs incorporate high-speed ADCs, DACs, AFEs, PLLs, clock distribution, FPGA or ASIC interfaces, power supplies, and GHz-class signal interfaces. The role calls for expertise in timing, synchronization, throughput, signal integrity, power integrity, noise performance, and hardware/software partitioning across modem and signal-processing systems. The engineer leads hardware design and development, guides PCB layout and board implementation, and conducts trade studies, simulations, hardware bring-up, debugging, verification, and component-level troubleshooting. The position supports products through integration, test, manufacturing, and production, while collaborating across engineering disciplines and providing technical leadership and mentoring.

Requirements

Bachelor’s degree in Electrical Engineering or a related field and 6 or more years of prior related experience, or a graduate degree and 4 or more years of prior related experience.
Active Secret security clearance.

Nice To Haves

Experience designing mixed-signal and high-speed digital hardware using ADCs, DACs, AFEs, FPGA interfaces, ASIC interfaces, and high-speed digital data paths, including hardware supporting or implementing DSP functions.
Strong understanding of direct-conversion, modem, and related communications and signal-processing architectures, including timing, synchronization, clocking, throughput, and converter interfaces such as JESD204.
Experience optimizing hardware platforms for DSP algorithms and working at the hardware/software boundary, including partitioning functions across hardware, programmable logic, embedded processing, and software-defined modem implementations.
Experience with signal integrity, power integrity, low-noise power design, and GHz-class board-level implementation, including point-of-load power supplies for FPGAs, ADCs, DACs, AFEs, and other high-performance devices.
Familiarity with RF principles applied to converter-based and high-frequency modem systems.
Experience with schematic capture, design analysis, laboratory debugging, and design verification testing.
Strong communication skills and ability to work effectively in a multidisciplinary engineering environment.
Experience with direct RF sampling, integrated AFEs, modern converter-based system architectures, PLLs, synthesizers, jitter-cleaning clocks, clock buffering, and phase-coherent timing systems.
Experience with SI/PI simulation and PCB layout guidance for high-speed mixed-signal hardware, and familiarity with metrics such as EVM, SNR, SFDR, ENOB, phase noise, I/Q imbalance, and LO leakage.
Experience with RF and high-frequency modem architecture, DSP integration, partitioning functions among hardware, FPGA or ASIC resources, firmware, and software, and implementing modems as part of a complete communications subsystem.
Experience supporting high-reliability, military, or aerospace hardware development.

Responsibilities

Lead architecture and design of mixed-signal, high-speed digital, and DSP hardware for receiver, transmitter, direct-conversion, and modem signal chains.
Perform schematic capture, component selection, derating, worst-case analysis, and hardware documentation.
Design hardware supporting or implementing DSP functions, including high-speed digital data paths, converter interfaces, synchronization, and throughput-critical processing chains.
Optimize digital hardware platforms used to execute, accelerate, or interface with DSP algorithms.
Guide PCB layout and board-level implementation, including stack-up definition, placement, controlled impedance, grounding, isolation, and power distribution.
Consider signal integrity, power integrity, dynamic range, jitter, phase noise, and overall noise performance in hardware designs.
Conduct trade studies, simulations, hardware bring-up, debugging, design verification, and component-level troubleshooting.
Support architecture selection, clocking strategy, hardware/software partitioning, and product performance through integration, test, manufacturing, and production.
Collaborate with FPGA, ASIC, RF, DSP, software, systems, mechanical, and manufacturing engineering teams.
Provide technical leadership and mentoring to junior engineers.