Senior RFIC Design Engineer

Kyocera International, Inc. (North America)•San Diego, CA
•$106,000 - $213,000•Onsite

About The Position

Join Kyocera International, Inc. as a Senior RFIC Design Engineer in San Diego, CA. This is a stable, long-term opportunity where your work matters in a fast-paced manufacturing setting. Kyocera is a leading manufacturer of high-tech ceramics used in various industries including aerospace, automotive, medical applications, and semiconductor processing. Our innovative materials are found in everything from smartphones to space shuttles. We have a long-tenured staff, a vital company mission, and an excellent benefits package. We strive to have a diverse workforce from all backgrounds. Kyocera International, Inc. has a robust corporate culture and philosophy based on the experiences and writings of our founder, Dr. Kazuo Inamori, with the company motto “Do the right thing as a human being.”

Requirements

  • Ph.D. in Electrical Engineering or a related field with specialization in RF, analog, mixed-signal, or microwave/mmWave IC design; no industry experience required. Alternatively, M.S. in Electrical Engineering or a related field with at least 3 years of relevant industry experience.
  • Strong foundation in analog and RF circuit design, including device physics, feedback, noise, linearity, mismatch, stability, frequency response, and circuit tradeoffs.
  • Academic or industry experience with transistor-level design and simulation of RF, analog, or mixed-signal integrated circuits.
  • Working knowledge of CMOS and/or SOI technologies, deep-submicron design considerations, RF passives, and critical analog/RF layout techniques.
  • Proficiency with Cadence Virtuoso and Spectre or comparable IC design tools; familiarity with RF and EM simulation, extraction, and physical-verification tools is preferred.
  • Ability to analyze simulation and measurement data, isolate root causes, and communicate technical conclusions clearly.
  • Laboratory experience with RF or analog measurements is desirable, including use of oscilloscopes, spectrum analyzers, network analyzers, signal generators, or related equipment.
  • Familiarity with Verilog-A, Verilog, SystemVerilog, MATLAB, Python, or SKILL is beneficial.
  • Strong problem-solving, documentation, communication, and teamwork skills, with the ability to work effectively in a cross-functional engineering environment.

Nice To Haves

  • Familiarity with RF and EM simulation, extraction, and physical-verification tools is preferred.
  • Laboratory experience with RF or analog measurements is desirable, including use of oscilloscopes, spectrum analyzers, network analyzers, signal generators, or related equipment.
  • Familiarity with Verilog-A, Verilog, SystemVerilog, MATLAB, Python, or SKILL is beneficial.

Responsibilities

  • Design and verify RF, analog, and mixed-signal circuit blocks from specification and topology selection through transistor-level implementation, layout, extraction, and signoff.
  • Analyze circuit tradeoffs involving performance, power, area, noise, linearity, gain, bandwidth, matching, stability, process variation, and reliability.
  • Contribute to the development of RFIC building blocks such as amplifiers, mixers, oscillators, frequency-generation circuits, data converters, filters, bias circuits, regulators, detectors, and calibration circuits.
  • Work with system engineers to derive block-level specifications, allocate design margins, and evaluate interactions between circuit blocks and the overall signal chain.
  • Plan and run schematic, post-layout, PVT, Monte Carlo, EM, mixed-signal, and reliability simulations; document results and address performance gaps.
  • Partner with layout engineers on floorplanning, critical-device placement, routing, shielding, matching, parasitic control, physical verification, and design-for-manufacturability.
  • Support RFIC-package-PCB co-simulation and evaluate the impact of interconnects, passives, coupling, supply integrity, and thermal effects on circuit performance.
  • Develop characterization plans, support laboratory measurements and silicon debug, and correlate measured results with simulation across operating conditions.
  • Collaborate with Test, Product, Applications, Firmware, and Manufacturing Engineering during validation, yield improvement, and product ramp.
  • Prepare clear specifications, design-review material, verification plans, and characterization reports; contribute to continuous improvement and intellectual property development.

Benefits

  • Competitive pay, benefits, and hours
  • 120 hours of vacation accrued per year to start (that's 3 weeks/year for regular 8-hour shifts!)
  • 10 Paid Holidays per year
  • 401(k) with company match
  • Pension
  • Medical, dental, and vision insurance
  • Flexible Spending Account (FSA)
  • Employee Assistance Program
  • Flexible schedules
  • Tuition reimbursement
  • life insurance
  • paid leave options
  • employer-paid Pension
  • 401(k) with both Roth and a healthy company match
  • onsite gyms, walking tracks, exercise rooms, and employee gardens!
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