About The Position

As a Senior Reticle Pattern Inspection Process Engineer at Micron Technology, you will develop and optimize advanced photomask inspection solutions for current and next-generation lithography technologies. The role focuses on reticle defect detection, automated defect classification, mask-to-wafer correlation, printability assessment, and inspection capability development. You will provide technical leadership across inspection programs and drive improvements in quality, yield, and manufacturing readiness through advanced analytics, AI-enabled workflows, and collaboration across multiple functions.

Requirements

  • Master's degree in Physics, Optics, Electrical Engineering, Materials Science, Mechanical Engineering, Chemical Engineering, or a related field; alternatively, a bachelor's degree with significant directly relevant industry experience.
  • At least 5 years of experience in photomask engineering, reticle inspection, wafer inspection, semiconductor defect engineering, advanced lithography, or related semiconductor manufacturing environments.
  • Experience developing, optimizing, qualifying, or sustaining advanced inspection processes and manufacturing systems.
  • Strong understanding of defect detection, defect classification, inspection sensitivity, nuisance reduction, and process optimization.
  • Experience leading technical projects and solving manufacturing challenges using statistical analysis and structured problem-solving methodologies.

Nice To Haves

  • Experience with EUV reticle inspection, High-NA EUV technologies, defect printability assessment, or mask-to-wafer correlation.
  • Experience with lithography simulation, aerial image analysis, wafer print checks, or physics-based defect assessment.
  • Experience developing automated defect classification, machine learning, advanced analytics, or AI-enabled inspection solutions.
  • Experience defining inspection-tool requirements and collaborating with equipment suppliers on emerging technologies.
  • Experience qualifying new equipment, software, algorithms, or manufacturing processes in advanced semiconductor environments.

Responsibilities

  • Develop, qualify, optimize, and sustain reticle pattern inspection processes, including EUV inspection and automated defect classification.
  • Lead defect characterization, printability assessment, and mask-to-wafer correlation activities to improve inspection effectiveness and defect disposition decisions.
  • Drive root-cause investigations and process improvements using SPC, FMEA, 8D, and data-driven problem-solving methodologies.
  • Lead equipment qualifications, supplier evaluations, technology assessments, and production-readiness activities for advanced inspection platforms.
  • Partner with lithography, mask engineering, manufacturing, R&D, and suppliers to introduce next-generation inspection capabilities and improve yield, productivity, and process stability.

Benefits

  • Choice of medical, dental, and vision plans.
  • Programs to help protect income in the event of illness or injury.
  • Paid family leave.
  • Paid time off.
  • Paid holidays.
© 2026 Teal Labs, Inc
Privacy PolicyTerms of Service