Senior/Principal RF Test Engineer, Texas Institute for Electronics

The University of Texas at Austin•Austin, TX

15h•Onsite

About The Position

Texas Institute for Electronics (TIE) is a well-funded semiconductor foundry venture focused on advancing the state of the art in 3D heterogeneous integration (3DHI), chiplet-based architectures, and multi-component microsystems. This role is crucial for evaluating new technologies and ensuring they are ready for advancement by providing reliable performance insights. The Senior/Principal RF Engineer will also enhance the organization's testing capabilities through process improvement, tool development, and clear guidance for internal teams and partners. The position requires eligibility to work in the United States on a full-time basis without sponsorship.

Requirements

M.S. in Electrical Engineering, Microwave Engineering, Applied Physics, or a related discipline with emphasis on RF/microwave measurement and characterization.
5+ years of hands-on experience in RF/microwave testing, characterization, or validation of ICs, modules, or packaged systems operating at K-band frequencies and above.
Deep working knowledge of S-parameter measurement, VNA calibration techniques, de-embedding, and on-wafer probing methodologies.
Proficiency with RF test instruments (VNAs, spectrum analyzers, signal generators, power meters) and measurement automation using Python, MATLAB, or LabVIEW.
Familiarity with RF simulation tools such as Keysight ADS, Ansys HFSS, Cadence AWR, or CST Studio for test-to-model correlation.
Understanding of electromagnetic effects in advanced packaging—signal integrity, coupling, and loss across interposers, redistribution layers, and 3D stacked assemblies.
Ability to work cross-functionally with design, packaging, EDA, and process teams in a fast-paced R&D environment.
10+ years of progressively responsible experience in RF/microwave test engineering, characterization, or validation—including at least 3 years in a technical leadership or principal role.
Expert-level knowledge of S-parameter characterization, advanced VNA calibration (TRL, LRRM, multi-line), de-embedding, and on-wafer probing techniques at millimeter-wave frequencies.
Proven ability to architect automated RF test frameworks for R&D characterization and production screening using Python, MATLAB, LabVIEW, or equivalent.
Deep understanding of electromagnetic effects in advanced packaging—signal integrity, coupling, loss, and thermal interactions across interposers, RDLs, and 3D stacked assemblies.
Strong proficiency with RF simulation tools (Keysight ADS, Ansys HFSS, Cadence AWR, CST Studio) for rigorous test-to-model correlation and root-cause analysis.
Track record of building or scaling RF test organizations, including lab infrastructure planning, team development, and process definition.
Ability to influence cross-functional roadmaps and partner with design, packaging, EDA, and program management teams in a defense-adjacent R&D setting.
Relevant education and experience may be substituted as appropriate.

Nice To Haves

Ph.D. in Electrical Engineering, Microwave Engineering, Applied Physics, or a related discipline with emphasis on RF/microwave measurement and characterization.
Experience testing Antenna-in-Package (AiP), RFIC/SiP, or 3D-stacked RF front-end modules for communications or sensing applications.
Hands-on experience with wafer-level probing at cryogenic temperatures or under thermal-vacuum conditions for high-frequency systems.
Familiarity with 3DHI design flows and the associated test challenges across heterogeneous die-to-die and die-to-interposer interfaces.
Knowledge of GaAs, GaN, SiGe, or CMOS RF processes and their impact on test strategy and fixture design.
Experience developing automated test frameworks for production screening or reliability qualification of RF components.
Strong technical writing and presentation skills for defense-sector reporting and industry collaboration.
Ph.D in Electrical Engineering, Microwave Engineering, Applied Physics, or a related discipline with emphasis on RF/microwave measurement, calibration science, or test methodology.
Experience defining RF test strategies for Antenna-in-Package (AiP), RFIC/SiP, or 3D-stacked RF front-end modules in volume or pre-production environments.
Hands-on experience with cryogenic testing, thermal-vacuum characterization, or reliability stress testing of high-frequency systems.
Familiarity with 3DHI design and assembly flows and the unique test challenges of heterogeneous die-to-die and die-to-interposer interfaces.
Knowledge of GaAs, GaN, SiGe, and CMOS RF processes and their implications for test planning, fixture design, and yield analysis.
Publication or patent record in millimeter-wave measurement techniques, calibration methods, RF packaging test, or antenna characterization.
Experience contributing to design kit or PDK test enablement deliverables.

Responsibilities

Develop and execute RF test plans for K-band (18–27 GHz), Ka-band (27–40 GHz), and W-band (75–110 GHz) microsystems at wafer, die, module, and system levels.
Perform S-parameter characterization, on-wafer probing, noise figure measurements, and power sweeps using vector network analyzers, spectrum analyzers, and signal generators.
Design and implement automated test sequences using Python, MATLAB, or LabVIEW to drive measurement instruments and collect production-grade data across process corners and temperature.
Develop de-embedding methodologies and calibration strategies for high-frequency measurements, including TRL, LRRM, and multi-line calibrations for on-wafer and package-level probing.
Correlate measured RF results against EM simulation models (HFSS, ADS, AWR, CST) to validate design intent and feed deviations back to the design and packaging teams.
Characterize passive and active RF components—including transmission lines, filters, LNAs, PAs, and T/R modules—within 3.0D heterogeneously integrated assemblies.
Support test infrastructure buildout, including fixture design, probe card specification, and lab setup for TIE’s RF characterization capabilities.
Author test reports, standard operating procedures, and design-for-test guidelines to support ecosystem partners and internal engineering teams.
Define and own the RF test strategy for TIE’s 3.0D heterogeneously integrated microsystems across K-band (18–27 GHz), Ka-band (27–40 GHz), and W-band (75–110 GHz), spanning wafer, die, module, and system levels.
Architect end-to-end test flows—from design-for-testability requirements through production screening—ensuring robust, repeatable, and scalable characterization of RF, mixed-signal, and antenna-in-package subsystems.
Lead development of advanced de-embedding, calibration, and measurement methodologies for novel 3DHI interconnect structures, including hybrid bonding interfaces, glass/Si interposers, and redistribution layers.
Drive test-to-model correlation across EM simulation (HFSS, ADS, AWR, CST) and measured data, establishing feedback loops with design, process, and packaging teams to accelerate yield learning and performance optimization.
Specify, procure, and commission RF test infrastructure—including probe stations, VNA configurations, automated handlers, and environmental chambers—for TIE’s characterization lab buildout.
Establish and mentor the RF test engineering team, setting technical standards, review processes, and best practices for measurement automation, data management, and statistical analysis.
Engage with foundry, EDA, metrology, and defense-program partners to define and validate test enablement requirements for next-generation RF packaging technologies.
Author test strategies, reliability qualification plans, reference test procedures, and design-for-test guidelines that become part of TIE’s Assembly Design Kit (ADK) deliverables.