Eng Sr Prin - Elec
About The Position
BAE Systems is seeking a Senior Principal FPGA Design Engineer to support FPGA designs through all phases of development. The ideal candidate is expected to perform activities including assisting in requirements generation and design architecture, ownership of RTL coding, synthesis, place and route, timing closure, basic test bench development, lab testing and debug, and product support. Because of the need for consistent, in-person collaboration and/or the requirement to perform all work onsite due to the nature of this particular role, it will be performed full-time on site. Please note that pursuant to a government contract, along with the ability to obtain a minimum of Secret Clearance #ESFPGA
Requirements
- 8+ years of relevant experience with bachelor's degree (less years with advanced degree)
- Current Security Clearance (Secret), or eligible to obtain one
- Significant experience in FPGA (preferred) or ASIC Design / Development
- VHDL (preferred) or Verilog HDL coding
- Familiarity with Xilinx Vivado or Intel/Altera Quartus
- Digital simulation using Modelsim/Questa
- Significant experience with static timing analysis and clock domain crossing techniques
- Experience with high speed interfaces like SERDES, PCIe, DDR2/3/4, LVDS
- Familiarity with revision control (GIT, CVS, Clearcase, Subversion, etc.)
- Some Experience generating scripts (Perl, Tcl, Python, shell, etc.)
- Strong debug and problem solving skills
- Strong written and oral communication skills
- Self-starter and a good team player
- Ability to mentor and willingness to be mentored
- Ability to distill higher level requirements into micro-architecture
Nice To Haves
- Experience in leading a design team a plus
- Some experience with data conversion techniques (ADC/DAC) a plus
Responsibilities
- Assisting in requirements generation and design architecture
- Ownership of RTL coding
- Synthesis
- Place and route
- Timing closure
- Basic test bench development
- Lab testing and debug
- Product support
- Modifying and enhancing legacy FPGA designs
- Hardware design and hands-on lab debug
- Working with FPGA design verification teams
Benefits
- Health, dental, and vision insurance
- Health savings accounts
- 401(k) savings plan
- Disability coverage
- Life and accident insurance
- Employee assistance program
- Legal plan
- Discounts on things like home, auto, and pet insurance
- Paid time off
- Paid holidays
- Paid parental leave
- Military leave
- Bereavement leave
- Any applicable federal and state sick leave
- Company recognition program to receive monetary or non-monetary recognition awards
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What This Job Offers
Job Type
Full-time
Career Level
Senior
