Marvell is hiring a senior leader for its central physical design team to shape the long-term vision for physical design capabilities and infrastructure in alignment with company-wide technology strategy. The role focuses on physical design and methodology for future high-performance processor chips built using leading-edge CMOS process technology for server and networking applications. The position leads RTL-to-GDSII implementation for multiple SoC programs, including synthesis, floorplanning, power grid design, place and route, clock tree synthesis, timing closure, power and signal integrity signoff, and physical verification. It provides strategic leadership and technical direction to physical design teams, supports successful and timely tapeouts, develops engineering talent, and oversees organization structure, hiring, performance management, and career development. The role also drives collaboration with design teams, resolves cross-functional conflicts, and advances physical design methodologies, flows, and automation to improve productivity and design quality.
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Job Type
Full-time
Career Level
Senior