Senior Power and Performance Engineer

NVIDIA•Us, CA

4d•Hybrid

About The Position

NVIDIA's Silicon Co-design Group (SCG) is responsible for the full product development lifecycle, from early architecture definition through silicon bringup to product release. The ArchDev team within SCG focuses on silicon and system-level feature development, driving tradeoff analysis, system integration, and POR alignment across the organization. This role offers the opportunity to see work progress from concept to silicon.

Requirements

BS or MS in EE/CE (or equivalent experience) with 8+ years in silicon power architecture, system-level design, validation, and power/performance optimization.
Strong EE fundamentals: digital design, low power design, DVFS, control systems, power management, timing, and architecture.
Solid understanding of firmware/driver structures and HW/SW interaction.
Programming proficiency in C/C++, Python, or Perl in Windows/Linux environments.
Strong problem-solving, collaboration, and communication skills.

Nice To Haves

Familiarity with clocking, boot/reset flows, and system architecture is a plus.
Hands-on lab experience (oscilloscopes, multimeters, logic analyzers) and silicon bringup exposure are a bonus.
Demonstrated cross-functional leadership — experience driving alignment across architecture, silicon, firmware, and software teams on complex, ambiguous problems.
System-level intuition — the ability to reason about power and performance holistically, not just at the block level, and to translate architectural tradeoffs into clear engineering decisions.
AI-assisted engineering fluency — comfort using AI tools (such as Claude, GitHub Copilot, or similar) to accelerate analysis, workflows, generate and review scripts, synthesize technical documentation, and explore solution spaces faster.
Candidates who treat AI as a force multiplier for their engineering judgment — rather than a replacement for it — will be well-positioned for how NVIDIA's teams are evolving.

Responsibilities

Architect and integrate system-level performance and power management features, controllers, and policies to optimize product efficiency across datacenter and client products.
Build feature roadmaps to address low-power, low-noise, and performance-per-watt product needs through prototyping, use-case analysis, and cost/benefit trade-offs.
Partner with architecture, ASIC, board/platform, software/firmware, and marketing teams to drive design decisions and debug complex issues.
Track industry trends and market needs and translate them into forward-looking roadmaps that keep NVIDIA's products ahead of the curve.
Lead debug efforts, develop workarounds, and support bringup, validation, manufacturing, and customer escalations.