SoC Power and Performance Architect

Intel•Hillsboro, OR

20h•Hybrid

About The Position

You will be joining One organization focused on SoC PTP across segments. Architecting the product for leadership performance and ensuring targets are hit through the life cycle Develops and drives end to end SoC architecture including firmware, hardware, platform specifications for highly optimized, modular, and scalable SoC, based on hardware features, requirements, and interoperability of hardware and software throughout the product life cycle. Drives SoC functionality, connectivity, configuration, performance, timing, power, and area goals. Drives evaluation and integration of existing IP blocks into new SoCs as well as the specification of any gaskets or glue logic. Evaluates feasibility tradeoffs and explores and defines new approaches and novel architectures for SoC. Invents, conceptualizes, and specifies microarchitecture and architectural features for next generation products to deliver optimized SoC for multiple segments from high performance computing to extreme low power products. Develops tests, test plans, and testing infrastructure for new architectures/features for SoC, performs functional modeling simulations, and conducts analysis of test results using advanced statistics and data predictions for benchmarking performance and determining areas for improvement. Provides experimental/proof of concept changes for proposing design alternatives meeting performance, power, area, and timing constraints. Reviews, challenges, and influences cross functional roadmaps and defines technology targets for future SoCs. Collaborates with architects, design engineers, system engineers, and verification engineers to improve the overall design of SoC and overcome constraints.

Requirements

B.S. / M.Sc. in Electrical Engineering, Computer Engineering, or a related field with 8+ years of relevant experience. OR Master's degree in electrical or computer engineering or a related field and 5+ years' experience, OR PhD in Electrical or Computer Engineering or a related field and 3+ years' experience.
Advanced understanding of SoC behavior and power and performance modeling.
Experience with power and performance studies, power management optimizations, and post-si validation
Advanced understanding of architecture, RTL, structural design (SD), validation, and post silicon processes including debugging and bug resolution
Highly self-motivated, able to operate independently and drive initiatives to completion.
Strong problem-solving skills and attention to detail.
Excellent communication and presentation skills are required.

Nice To Haves

Experience with Python or scripting languages like C/C++ to develop and maintain analysis tools, flows, and methodologies.
LLM engineering workflows and automation tool development
Experience with Intel IPs and full product development lifecycles.
Expertise in power and performance analysis, system level tradeoffs, and power reduction techniques.
Background in high performance computing, graphics, or AI accelerator architectures.
Experience in semiconductor physics and process technology and their impact on power and performance.
Proven ability to lead complex, cross functional technical initiatives with measurable business impact.
Demonstrated success in competitive analysis, market assessment, and long-term roadmap planning.
Knowledge of business marketing strategies and competitive positioning.
Experience in developing and maintaining analysis tools, flows, and methodologies.

Responsibilities

Develops and drives end to end SoC architecture including firmware, hardware, platform specifications for highly optimized, modular, and scalable SoC.
Drives SoC functionality, connectivity, configuration, performance, timing, power, and area goals.
Drives evaluation and integration of existing IP blocks into new SoCs as well as the specification of any gaskets or glue logic.
Evaluates feasibility tradeoffs and explores and defines new approaches and novel architectures for SoC.
Invents, conceptualizes, and specifies microarchitecture and architectural features for next generation products to deliver optimized SoC for multiple segments from high performance computing to extreme low power products.
Develops tests, test plans, and testing infrastructure for new architectures/features for SoC, performs functional modeling simulations, and conducts analysis of test results using advanced statistics and data predictions for benchmarking performance and determining areas for improvement.
Provides experimental/proof of concept changes for proposing design alternatives meeting performance, power, area, and timing constraints.
Reviews, challenges, and influences cross functional roadmaps and defines technology targets for future SoCs.
Collaborates with architects, design engineers, system engineers, and verification engineers to improve the overall design of SoC and overcome constraints.