Senior Physical Design Engineer

Advanced Micro Devices, Inc•Markham, ON

1d•Hybrid

About The Position

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. In this role you will be given an opportunity to work on the next generation technology that will be part of future AMD Microprocessors powering Servers and Personal Computers as well as Graphics Cards and VR sets. The DXIO FEINT/Implementation team is responsible for Synthesis, place & Route, Timing closure/CDC/LINT/DFx for very high speed (>2G) design with complex I/O clocking.

Requirements

Bachelors or Masters degree in computer engineering/ Electrical Engineering
Synthesis, Floor-planning, Placement, clock trees synthesis, Post Route Timing closure for high-speed >=2GHz designs.
STA, Physical design flow & scripting in TCL, Python

Nice To Haves

Fusion Compiler experience will be preferred.

Responsibilities

Drive all implementation aspects of next generation of IPs.
Work on multiple I/O protocols including PCIe, UCIe, UALink & Infinity Fabric link-layer.
Own implementation activities including Synthesis, floorplan, placement, clock tree synthesis, routing and STA closure.
Develop reference floorplans and implementation scripts for SoCs worldwide.
Support SoCs worldwide.