Senior Manager - Design Engineering (IP)

Microchip Technology Inc.•San Jose, CA

1d•Hybrid

About The Position

As an IP Manager in the Microchip Data Center Solutions group, you will be responsible for the strategic sourcing, acquisition, and management of intellectual property services and assets from internal and external IP vendors. This role ensures seamless coordination between internal Program/I2R teams and IP vendors, manages service agreements and budgets, and facilitates the timely and cost-effective procurement of IP protection in alignment with the company's business objectives.

Requirements

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
12+ years of industry experience in Product and IP management.
Experience in one or more of the following technologies - PCIe, CXL, DDR (DDR4/5, LPDDR) memory subsystem IPs, RAID or storage subsystem technologies.
Understanding of data center workloads, performance requirements, and system architecture trends.
Background in IP governance, security requirements, and compliance frameworks.
Familiarity with vendor ecosystems such as Synopsys, Cadence, Arm, Rambus, ProteanTec, etc.
Strong understanding of digital IP blocks and SoC development workflows.
Proven experience working with external IP vendors, SoWs, licensing models, and vendor negotiations.
Excellent communication, documentation, and cross-functional coordination skills.
Ability to manage multiple IPs across multiple programs in parallel.

Responsibilities

Own the end-to-end procurement process for third-party IPs used in data center SoC programs.
Maintain an IP roadmap aligned with program planning, technology evolution, and product strategy.
Evaluate IP solutions based on technical, quality, performance, security, and long-term support criteria.
Serve as the primary point of contact for all IP vendors throughout the engagement lifecycle.
Track vendor execution, delivery schedules, and performance metrics to ensure commitments are met.
Drive regular technical and program sync-ups with vendors to troubleshoot issues and maintain alignment.
Act as the primary technical liaison between internal Program/I2R teams and vendors.
Ensure internal requirements—performance, power, latency, interfaces, testability, security—are clearly captured and reflected in SoW and IP specs.
Coordinate with Program team and maintain detailed plans for IP deliverables across programs.
Ensure delivery of high-quality IP from vendors, including RTL, testbench, documentation, performance data, and errata.
Coordinate with Program team on escalation and resolution of IP bugs, support requests, and change requests.
Manage the lifecycle of IP versions across multiple programs (maintenance, upgrades, patches, security updates).
Drive continuous improvements with vendors to meet data center-class quality and reliability expectations.