Senior IP Project Engineer

NXP Semiconductors • Austin, TX

4d • Onsite

About The Position

We are part of ACE (AI & Chip Engineering), a central design organization within NXP, developing products for multiple business lines in Automotive, Internet of Things (IoT), Networking, and Radio Frequency products, with expertise in hardware engineering, including architecture, IP, and full SoC Design. ACE Digital IP team produces design solutions covering the very wide range of SoCs required by the business lines. The team is challenged to produce industry-leading solutions covering very cost-sensitive, low-power devices to highly integrated, high-performance, multi-cohort devices compliant with the latest automotive and industrial safety and security standards.

Requirements

• BSEE required; MSEE preferred with 7+ years of industry related experience
• Good understanding of IP development process and methodology with technical depth and project execution leadership
• Experience in protocols like AHB/AMBA, Memory (ROM, RAM, Flash, LPDDR/DDR3/4) and memory controllers a plus.
• Experience driving execution across multidisciplinary teams, with ownership of plans, schedules, dependencies, risks, and tracking
• Strong planning skills and hands-on use of Microsoft Project, Jira, Confluence, Power BI, and Excel for scheduling, tracking, risk management, and data collection
• Good understanding of semiconductor development lifecycle, design and verification methods, and integration dependencies
• Experience in all aspects of RTL design flow from Specification/Micro-architecture definition to design and verification, Timing Analysis, DFT and Implementation a plus
• Good understanding on Chip Assembly, IP Integration, RTL signoff tools and CDC/RDC/Lint/Synthesis.
• Able to work effectively with global teams; self-motivated to solve problems and manage deliverables
• Excellent interpersonal and communication skills
• Excellent leadership and negotiation skills

Responsibilities

• Own end-to-end execution and delivery of IP and subsystem milestones from architecture through release
• Define development phases, schedules, milestones, dependencies, and quality expectations with architects and engineering leads
• Coordinate execution across architecture, design, verification, validation, software, and SoC integration teams
• Identify risks early, drive resolution, and escalate critical issues that threaten execution, quality, or release commitments
• Lead technical reviews and execution checkpoints with clear status, actions, and follow-through
• Drive alignment on specifications, interfaces, release content, and handoff requirements
• Drive priority and trade-off discussions within IP scope
• Resolve interface issues, integration dependencies, and execution trade-offs with internal and external stakeholders
• Support release readiness, signoff reviews, and integration milestones by driving issues to closure
• Improve execution visibility through data collection, milestone tracking, risk registers, and engineering metrics

Benefits

• online and offline learning opportunities to help you develop some of your core and professional skills
• programs in place focused on diversity, inclusion and equality

What This Job Offers

• Job Type: Full-time
• Career Level: Senior
• Education Level: Associate degree