Senior IC Package Design Engineer - TeraWave

BLUE ORIGIN•San Diego, CA

6d•$230,398 - $322,557•Onsite

About The Position

At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight! Blue Origin is pioneering the future of space-based communications with TeraWave, a revolutionary satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth. This multi-orbit constellation will consist of optically interconnected satellites in low Earth orbit (LEO) and medium Earth orbit (MEO), providing enterprise-grade connectivity for critical operations worldwide. The Silicon Systems organization at TeraWave designs, develops, and produces custom silicon solutions for our satellite communications constellation, serving data center, enterprise, and government customers with high-speed internet services. As a Senior IC Packaging: Signal and Power Integrity Engineer, you own signal and power integrity for our RFIC and mmWave packaging, with a focus on RF implementation, high-speed signal integrity, and power integrity for integrated circuit packaging. You report to the VP of Silicon Systems and collaborate closely with RFIC designers, mmWave designers, ASIC designers, and SoC architecture teams. This is an individual contributor role that may operate as a technical lead for the signal and power integrity portion of package delivery.

Requirements

Bachelor's degree in Electrical Engineering or related field such as Computer Engineering.
7+ years of industry experience, or the combination of industry experience and equivalent research from a PhD program.
Demonstrated experience delivering integrated circuit packaging in a production or tangible-delivery environment.
Expertise with 2.5D and 3D electromagnetic simulators such as HFSS, EMX, or Momentum.
Experience with RF modeling, RF impedance, and signal and power integrity for high-speed routing.
Must be a U.S. citizen or national, U.S. permanent resident (current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.

Nice To Haves

Advanced degree such as a Master's or PhD in Electrical Engineering or related field.
mmWave expertise and SERDES experience for high-speed integrated circuit packaging and interfaces.
Experience coordinating with OSATs and designing with Cadence Allegro for package layout.
Extensive experience with thermal, electromagnetic, and signal integrity simulations at package and system levels.
Experience mentoring early-career engineers on signal and power integrity practices.
Strong communication skills and effective cross-functional collaboration across design and architecture teams.

Responsibilities

Own signal and power integrity for RF/Mixed-Signal and mmWave integrated circuit packaging designs.
Perform signal integrity analysis and HFSS simulation for high-speed signals across package interfaces.
Design and analyze power delivery networks using HFSS to meet power integrity targets.
Model and characterize RF and mmWave packaging with HFSS simulation tools and procedures.
Collaborate with RFIC, mmWave, ASIC, Package Layout, and SoC architecture teams on package requirements.
Lead the signal and power integrity portion of package delivery as a technical lead.
Create documentation and specifications and support design reviews for packaging deliverables.