Senior Hardware Design Engineer

Fairchild Imaging•San Jose, CA

About The Position

Fairchild Imaging is seeking an experienced Senior Hardware Design Engineer to lead the design and development of advanced PCB-based electronic systems with high-speed digital interfaces, complex multilayer boards, and demanding signal and power integrity requirements. The role calls for deep expertise in high-speed digital hardware design, PCB architecture, signal integrity, power delivery, and system-level optimization. USB-C interoperability and robust high-bandwidth data interfaces are especially valuable. The position also involves technical leadership, mentoring engineers, helping set project direction, and supporting engineering excellence and team growth. The engineer will architect, design, and validate complex multilayer PCBs and high-performance electronic systems; guide component selection, schematic design, layout constraints, and interconnect strategies; and collaborate with firmware, software, systems, and other engineering teams. The role includes USB-C system integration and interoperability, signal- and power-integrity analysis, prototype bring-up, lab debugging, failure analysis, validation, and design iteration. The position may include direct management of a small hardware engineering team. Fairchild Imaging is a specialty image sensor design and manufacturing company headquartered in San Jose, California. Its CMOS image sensors are used in applications including space exploration, medical X-ray, science, quantum computing, machine vision, low-light imaging, and 360 situational awareness.

Requirements

BS or MS in Electrical Engineering or a related field.
8 or more years of hardware design experience, including complex multilayer PCB design.
Proven expertise designing high-speed digital systems and high-density PCBs.
Demonstrated technical leadership, mentoring, or team lead experience.
Strong working knowledge of signal integrity, power integrity, EMI/EMC, and high-speed layout constraints.
Practical experience with high-speed interfaces such as USB-C, USB, LVDS, or other high-speed serial and differential interfaces.
Experience with schematic capture and PCB layout tools such as Altium Designer, Cadence Allegro, or equivalent.
Hands-on lab debugging skills using oscilloscopes, logic analyzers, protocol analyzers, and related instrumentation.
Demonstrated ability to troubleshoot complex hardware issues, identify root causes, and drive corrective actions.
Strong technical communication and cross-functional collaboration skills.

Responsibilities

Provide technical leadership across hardware development programs.
Mentor junior and mid-level hardware engineers in schematic design, PCB layout, debugging, and engineering best practices.
Lead hardware design reviews, architecture discussions, and cross-functional technical decision-making.
Establish and promote engineering standards for high-speed PCB design, signal integrity, documentation, and validation.
Support project planning, task prioritization, resource estimation, and execution tracking.
May directly manage a small team of hardware engineers, including goal setting, performance feedback, career development, coaching, hiring, and onboarding.
Architect, design, and validate complex multilayer PCBs for high-performance electronic systems.
Define board-level architectures, component selection, schematics, layout constraints, and interconnect strategies.
Design and validate USB-C and USB high-speed data interfaces, LVDS and other high-speed serial interfaces, and high-speed differential links and memory interfaces.
Collaborate with firmware, software, systems, and other engineering teams to ensure robust system integration.
Optimize board architecture, power delivery, grounding, clocking, and layout to meet performance, reliability, and noise requirements.
Evaluate and mitigate design impacts on system performance, including timing errors, electrical noise, EMI/EMC coupling, and power integrity artifacts.
Design and debug robust USB-C implementations, including connector orientation and configuration support, enumeration and connection reliability, sustained high-bandwidth data streaming, cable/host/hub interoperability, power sequencing, and interface robustness.
Diagnose intermittent hardware and interface failures through systematic testing, measurement, and root-cause analysis.
Analyze and resolve signal integrity and power integrity challenges across USB-C and other high-speed interfaces.
Work with firmware and software teams to distinguish hardware, firmware, and system-level failure modes.
Serve as a technical authority in high-speed and high-density PCB design.
Apply and guide best practices for signal integrity analysis and validation, impedance control and stackup design, differential-pair routing and skew management, return-path continuity and via transitions, crosstalk and insertion-loss mitigation, and power integrity and low-noise supply design.
Drive schematic and layout reviews, design-for-test considerations, and hardware validation plans.
Lead prototype bring-up, lab debugging, failure analysis, and design iteration.
Document design decisions, test results, and corrective actions to support reliable product development and production readiness.