Senior Hardware Design Engineer, Ethernet Switching

Arista Networks•Roseville, CA

6d•$260,000 - $470,000•Onsite

About The Position

Arista Networks is an industry leader in data-driven, client-to-cloud networking for large data center, campus and routing environments. We leverage the latest advancements in cloud computing, artificial intelligence, and software-defined networking to provide our clients with a competitive edge. Our solutions are designed to not only meet the current demands of the digital landscape but to also anticipate and adapt to future challenges. We value the diversity of thought and perspectives that each employee brings to the table, fostering an inclusive environment. We are growing in Roseville and seeking founding engineers to shape Arista’s new Roseville R&D Lab, designing next-generation networking technology.

Requirements

BSEE or MSEE
10+ years of relevant experience in hardware engineering
Experience designing Networking Hardware, particularly involving 100G and 200G PAM4 Ethernet switching
Embedded x86/ARM system design is highly desirable
Experience designing 20+ layer count boards featuring 50G+ signals, and advanced PCB manufacturing technologies such as sequential lamination, HDI, and ultra-low-loss materials
Experience working with multi-phase DC/DC’s for high current, high transient loads
Experience working with High speed interfaces, such as DDR, PCIe
Writing specifications and drawing schematics for high complexity boards
Working closely with CAD designers on complicated layout and routing
Working closely with Software and test engineers to bring-up and debug systems
Familiarity with signal integrity and power integrity concepts and tools, such as: impedance, PDN’s, differential routing, insertion loss, S-parameters, TDR’s, VNA’s
Experience with mass production Design for Manufacturability (DFM)
FPGA design and system simulation using Verilog
Working with Contract Manufacturers
Successfully taking products from concept to production

Responsibilities

Authoring Functional Specifications of high power and high density Ethernet switches used in AI networks
Selecting and Qualifying Components
Schematic Capture (both flat and hierarchical)
Working closely with eCAD teams on PCB layout and component footprints
Working with internal teams to run (or run your own) signal integrity simulations on both power and datapath signals
Specifying PCB stackup and fabrication details with various PCB vendors
Working closely with local and overseas Contract Manufacturers (CM), from proto through production
Lab bring up and debug of prototypes
Driving complex system debug between software, hardware, and test teams
Training CM for high yield test and manufacturing
Guiding groups of engineers and mentoring younger engineers