Senior FPGA Development Engineer

Echodyne Corp•Kirkland, WA

1d•$137,196 - $205,382

About The Position

Echodyne is seeking a Senior FPGA Development Engineer to design and produce radar equipment subsystems. The role works with an experienced cross-disciplinary team to create radar systems solutions, design and build FPGA solutions, and contribute to the team’s HDL development practices. It requires technical ownership, systems knowledge, a quality-focused embedded development mindset, and the ability to work effectively in a collaborative, fast-paced environment. The engineer will work alongside radar, signal processing, and software engineers to implement platform functionality for system control and signal processing needs. The role also includes mentoring junior engineers, providing technical direction, and driving improvements to engineering coding practices, tools, testing, and reusable architectures.

Requirements

Proficient communication of ideas, plans, and designs to teammates.
Ability to delineate scope, prepare work plans, resolve design conflicts, and oversee design implementation steps.
Solid understanding of FPGA architectures, including DSP and SoC, hardware/software interfaces, and DDR, SRAM, and Flash memory interfaces.
Experience with FPGA design tools and methodologies, including simulators and static code analyzers; specifically, Vivado, Quartus, QuestaSim, Blue Pearl, design documentation software, JIRA, and Git.
Knowledge of embedded systems debugging, troubleshooting, and code testing using JTAG debuggers, oscilloscopes, logic analyzers, multimeters, and spectrum analyzers.
Knowledge of Python, Tcl, or other scripting languages for development and testing automation.
Knowledge of the software development life cycle and good coding practices.
Experience interfacing embedded systems to host computers and peripherals using common communications protocols, including UART, SPI, QSPI, I2C, and TCP/UDP IP.
Experience with common interfaces such as AXI and AXI-Stream.
Bachelor of Science degree in electrical engineering, computer engineering, computer science, or equivalent military or industry experience.
At least 5 years designing, implementing, building, integrating, and testing Verilog/SystemVerilog and VHDL software solutions.
Working knowledge of hardware/PCB design, embedded software, and verification.
Must establish eligibility to handle U.S. Government export-controlled information or obtain required Government authorizations; applicants are asked to identify whether they are a U.S. citizen or green card holder, or have asylum/refugee status in the U.S.

Nice To Haves

Experience with one or more high-speed interfaces, such as CML, LVDS, JESD, SERDES, Ethernet/UDP, Aurora, or PCI-E.
Working DSP knowledge, including HDL development for radar, electronic warfare, cellular, or other wireless technology.
Experience with fixed-point mathematics, implementation tradeoffs, and modeling; MATLAB or SciPy experience is a plus.
Ability to lead a project team of three or more engineers within or across disciplines.
Familiarity with continuous integration, HIL testing, and Agentic AI workflows.

Responsibilities

Architect, design, implement, integrate, and test FPGA-based solutions.
Write efficient, robust, timing-optimized, and maintainable VHDL/Verilog code.
Take ownership of tasks and seek guidance when needed.
Develop and execute plans of action based on design requirements and constraints.
Hold and participate in design reviews and peer reviews.
Work with and support technical and non-technical team members with integrity and professionalism.
Drive improvements to coding practices and tools across engineering.
Design and develop reusable cross-platform architectures and frameworks.
Help drive and support testing efforts across teams and projects.
Collaborate with radar, signal processing, and software engineers to implement platform functionality for system control and signal processing needs.
Mentor and provide technical direction to junior developers.