Senior FPGA Design Engineer

University of Southern California • Arlington, VA

4d • Hybrid

About The Position

USC’s Information Sciences Institute (ISI), part of the Viterbi School of Engineering, conducts research and development in information processing, computing, communications, and artificial intelligence. The Reconfigurable Computing Group develops adaptable, efficient, and trustworthy specialized hardware through FPGA prototyping, ASIC design, electronic design automation (EDA) tools, and hardware-software co-design. Its work includes reconfigurable processing for RF sensing and communications, fully homomorphic encryption acceleration, and hardware security and assurance.

The Senior FPGA Design Engineer will research and develop tools and techniques for assuring FPGA hardware. Working with research staff and technical collaborators, the engineer will plan and execute specialized FPGA designs, examine device functionality and state, measure and analyze device characteristics using hardware and laboratory instrumentation, and extend commercial and open-source EDA tools with assurance capabilities. The position is based in Arlington, Virginia, with hybrid work options available. The role requires independent work under minimal supervision, technical documentation and communication, and, as needed, reviewing implementations, establishing engineering practices, and mentoring junior staff.

Requirements

• Master’s degree in computer engineering, electrical engineering, computer science, or a closely related field; combined experience and education may substitute for the minimum education requirement.
• At least eight years of overall relevant research engineering experience, including at least five years of directly relevant FPGA design experience.
• Demonstrated experience planning and executing FPGA designs and developing RTL in VHDL or Verilog.
• Proficiency with scripting languages such as Python or TCL.
• Proficiency with FPGA EDA tools such as AMD Xilinx Vivado or Intel Altera Quartus, including synthesis, implementation, and timing closure.
• Experience interfacing directly with FPGA hardware, power supplies, and other test instrumentation.
• Willingness and eligibility to apply for and maintain a Top Secret security clearance; eligibility requires U.S. citizenship.
• Knowledge of one or more relevant programming languages, such as Python, C++, or Golang.
• Experience with Linux, Virtual LAN and/or Virtual Extensible LAN, Melanox Switches, SDN programming, Ansible, Bash, Nagios, Prometheus, Simple Network Management Protocol, applicable IT protocols such as Border Gateway Protocol, Secure Shell, and Transport Layer Security, iptables, and Network File System.
• Excellent written and oral communication skills.

Nice To Haves

• Ten or more years of relevant research engineering experience.
• Current Secret security clearance or higher.
• Experience applying large language model-assisted design to FPGAs or implementing AI or machine-learning workloads on FPGAs using AMD Vitis AI or Intel Altera FPGA AI Suite.
• Knowledge of FPGA architecture and device primitives, including AMD Xilinx Zynq, Virtex-7, UltraScale+, or Versal devices, or comparable Intel Altera devices.
• Contributions to or experience with open-source EDA tools such as Google Project X-Ray, VTR or VPR, RapidSmith, or TORC.
• Demonstrated use of revision-control systems such as Git or Mercurial in a multi-user project environment.
• Master’s degree (listed as preferred education in the additional qualifications).
• Proven leadership ability.
• Experience in a university environment.
• Experience with artificial intelligence, very large-scale integration design, machine learning, deep learning (e.g., TensorFlow, PyTorch, HuggingFace), and Dockerization.

Responsibilities

• Plan, lead, implement, and verify specialized FPGA systems and RTL components in VHDL or Verilog to support hardware-assurance research.
• Use FPGA EDA tools for synthesis, implementation, timing analysis, timing closure, and device programming.
• Interface with FPGA hardware, power supplies, and other test instrumentation to collect measurements, validate behavior, and analyze device functionality and characteristics.
• Develop Python, TCL, and related scripts to automate design flows, testing, data collection, and analysis.
• Identify, plan, and implement extensions to commercial and open-source EDA tools, and evaluate new FPGA-assurance capabilities.
• Translate research concepts and project goals into technical plans, implemented prototypes, and independently developed system components under minimal supervision.
• Document designs, methods, test results, and technical progress; contribute to sponsor reports, publications, presentations, and collaborator meetings.
• Review technical implementations, establish engineering best practices, provide technical mentorship, and guide junior researchers and engineers as needed.
• Stay current with FPGA architectures, EDA methods, hardware-assurance research, and relevant emerging AI-assisted design approaches.

Benefits

• Opportunities to work on engaging projects with real-world impact and contribute across the project lifecycle in a small-team environment.
• A workplace that supports work-life balance.
• Access to opportunities for top-tier university education for employees and their children.
• Comprehensive benefits, including medical coverage and matched retirement contributions.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior