Senior Engineer (Andover, MA)
About The Position
Infineon Technologies Americas Corp. is seeking a Senior Engineer to support the design and development of state-of-the-art digital power controllers. This role is responsible for digital design, design verification, and analysis. The engineer will run system-level digital/behavioral simulations and correlate them to real-time hardware lab measurements. They will interact with the embedded firmware team to evaluate and verify chip-level functionality. The position involves planning and executing unit/subsystem/system level design and verification using SystemVerilog and UVM. Building scalable and reusable test benches in System Verilog/UVM to develop checkers, monitors, scoreboard, and cover points is a key responsibility. The role also includes performing code and cover-point coverage analysis and enhancing tests to maximize coverage. Additionally, the engineer will perform early design analysis including lint, CDC and RDC, implement STA and UPF constraints for synthesis and P&R, and provide technical documentation of system implementation and behavior.
Requirements
- Bachelor’s degree in Computer Science, Computer Engineering, or related field
- Experience or coursework in Digital or electronics design and verification
- Experience or coursework in Analytical computational tools (Matlab, Python or equivalent)
- Experience or coursework in Circuit simulation and analysis tools (Spice, Simetrix, SIMPLIS, NL5)
- Experience or coursework in Verilog/SystemVerilog
- Experience or coursework in RTL digital simulator on Unix/Linux environment (Xcelium, ModelSim, NCsim, or equivalent)
- Experience or coursework in RTL verification methodologies and working knowledge of UVM
- Experience or coursework in Methodologies for FPGA emulators and hardware prototype-based verification
- Experience or coursework in Microcontroller-based architectures and programming languages (ARM, C)
- Experience or coursework in Software tool automation and Scripting languages (Perl, Tcl, Python)
- Experience or coursework in Lab environment automation and data capture
Responsibilities
- Digital design, design verification, and analysis
- Run system-level digital/behavioral simulations and correlate to real-time hardware lab measurements
- Interact with the embedded firmware team to evaluate and verify chip-level functionality
- Plan and execute unit/subsystem/system level design and verification using SystemVerilog and UVM
- Build scalable and reusable test benches in System Verilog/UVM to develop checkers, monitors, scoreboard, and cover points
- Perform code and cover-point coverage analysis and enhance tests to maximize coverage
- Perform early design analysis including lint, CDC and RDC
- Implement STA and UPF constraints for synthesis and P&R
- Provide technical documentation of system implementation and behavior
Benefits
- Employee Referral Program
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What This Job Offers
Job Type
Full-time
Career Level
Senior
