Senior Engineer I - Physical Design

MicrochipChandler, AZ
Onsite

About The Position

This role supports Physical Design related project activities for Microchip's Microcontroller and Wireless Business Units, focusing on 32-bit mixed signal microcontrollers and microcontrollers with integrated wireless radios. The position is within a large, global organization known for its technology that powers the world, offering an atmosphere of trust, empowerment, respect, diversity, and communication. Microchip Technology Inc. is recognized for its commitment to employee development, values-based decision making, and strong sense of community, with nationally-recognized Leadership Passage Programs supporting career growth.

Requirements

  • Bachelor’s Degree in Electrical or Electronics Engineering
  • Strong engineering background
  • 5+ years of relevant physical design experience
  • Strong understanding of VLSI and related concepts
  • Understand logic synthesis and timing concepts (setup, hold, uncertainty, etc)
  • Scripting skills in any programming language (TCL and Pyton preferred)
  • Basic design knowledge of RTL (VHDL/VERILOG) coding
  • Able to work independently under local project lead/supervisor mentorship
  • Excellent debugging and analytical skills
  • Good verbal and written communication skills
  • Strong interpersonal skills

Responsibilities

  • Implement all aspects of physical design such as floor planning, placement optimization, clock tree synthesis, routing, crosstalk avoidance, EMIR, and physical verification.
  • Work on place and route methodologies and low power methodologies.
  • Collaborate with multiple teams across a geographically diverse company to achieve desired design goals.
  • Provide timing closure support to maximize process node capability.
  • Perform clock tree setup/debug and synthesis for optimal QoR.
  • Execute general physical implementation procedures.
  • Design and support multi-voltage island-based floorplans.
  • Develop flows and implement automation.
  • Deliver Physical Verification-clean designs.
  • Perform die size estimation and bond out approval.
  • Interface with external vendors and IP sources to resolve problems.
  • Work with members from international design/implementation teams.

Benefits

  • Health benefits that begin day one
  • Retirement savings plans
  • Industry leading ESPP program with a 2 year look back feature
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