Senior DSP Engineer, ALG, Amazon Leo Government

Amazon • Los Angeles, CA

19h • $137,300 - $185,700 • Onsite

About The Position

The Senior DSP Engineer will play a pivotal role in the Amazon Leo Government (ALG) team, delivering innovative and fast-paced analysis and design solutions. This role focuses on satellite and ground system design and analysis, as well as the design of various phased array communication system needs (link budget, beamforming, calibration, compensation, etc.) of the electronics sub-systems. The candidate will lead tasks from DSP design and algorithm selection to FPGA implementation, board bring-up, and testing. They will collaborate across teams, support design reviews, and prepare joint reports and proposals. A key aspect of this role is understanding customer needs and conducting trade-off analyses to ensure proposed solutions meet customer goals. The successful candidate will have experience with complex programs, diverse teams, and partner organizations, including government agencies. They should also demonstrate the potential to lead small sub-teams and prepare clear, technically compelling written reports.

Requirements

• Bachelor’s Degree in Electrical or Computer Engineering or related discipline, or equivalent experience
• 7+ years of experience in hardware development across the full product life cycle (concept to production)
• 7+ years of electrical engineering work experience in Space, Aerospace/Defense, Automotive, and/or Communications fields or combination thereof.
• 7+ years of experience with DSP algorithm development and hardware test system debugging.
• US Citizen
• Able to obtain and maintain a US Government security clearance of TS/SCI.

Nice To Haves

• Master's or PhD degree in Electrical or Computer Engineering or related discipline.
• Translate DSP algorithms from MATLAB/Simulink models to synthesizable HDL (VHDL/Verilog) using HDL Coder or manual RTL design.
• Architect efficient FPGA implementations of DSP processing chains with pipelining, parallelism, and resource sharing strategies.
• Implement digital down-converters (DDC), digital up-converters (DUC), polyphase filter banks, and channelizers in Matlab / Simulink / RTL.
• Perform FPGA synthesis, timing closure, and resource optimization for Xilinx UltraScale+/Versal or Intel Agilex devices.
• Verify RTL designs against MATLAB/Simulink golden reference models using co-simulation.
• Track record of successfully delivering compelling written reports and complete designs on time, to scope, with high quality.
• High sense of ownership, urgency, and drive; resourceful, and able to deliver results with minimal direction.
• Excellent oral and written communication skills.
• Demonstrated experience working with government agencies.
• US Security Clearance
• Experience in developing functional specifications, design verification plans and functional test procedures.
• Master's degree in electrical engineering, computer engineering, or equivalent.
• Experience working with interdisciplinary teams to execute product design from concept to production.
• Experience with the project management of technical projects.

Responsibilities

• Interact directly with customers to understand technical requirements, and translate them into technically robust solutions backed by data and analysis.
• Design and develop DSP algorithms for phased array antenna communication systems including beamforming, beam steering, null steering, and adaptive array processing.
• Develop and validate signal processing chains in MATLAB and Simulink, including fixed-point modeling and bit-true simulations.
• Implement and optimize FFT/iFFT architectures for OFDM waveforms, channelization, spectral analysis, and frequency-domain beamforming.
• Collaborate with RF engineers, antenna engineers, and systems engineers to define interface requirements and performance budgets.
• Analyze system performance metrics (EVM, BER, SINR, beam patterns, sidelobe levels) and optimize DSP implementations.
• Develop calibration algorithms for phased array systems including amplitude/phase correction, mutual coupling compensation, and array manifold characterization.
• Model and simulate RF impairments (I/Q imbalance, phase noise, nonlinearity) and develop DSP-based mitigation techniques.
• Perform trade studies on algorithm complexity, latency, throughput, and resource utilization.
• Deliver well-written documentation, reports, and presentations for technical design reviews and as part of proposal efforts.
• Design and support test campaigns, both development and qualification/acceptance, for space hardware.

Benefits

• health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage)
• 401(k) matching
• paid time off
• parental leave
• sign-on payments
• restricted stock units (RSUs)

What This Job Offers

• Job Type: Full-time
• Career Level: Senior