Senior DevTech Compute Engineer, Compression and Data Processing

NVIDIA•Us, CA

3d•Hybrid

About The Position

NVIDIA is seeking a highly motivated Senior DevTech Compute Engineer for Compression and Data Processing. This role involves prototyping and developing groundbreaking methods and data formats to accelerate complex distributed workflows, investigating and overcoming system-level bottlenecks for multi-stage and multi-IP overlapped workloads, and optimizing data entropy for various data types. The position offers an opportunity to co-design systems, software components, and hardware blocks for the next frontier of distributed data processing. Data analytics, databases, and distributed data processing are rapidly growing domains for non-CPU accelerated computing, with "on-the-wire" compression and decompression being integrated into switches and DPUs, and low-latency queries across vast datasets in data lakes being crucial for business agility. The Devtech Compute team at NVIDIA takes a holistic approach to data movement, late materialization, memory management and spilling, parallel algorithms, collectives, and compression and quantization. The role will involve prototyping and integrating novel approaches to GPU-accelerated distributed data processing, including dataframe analytics, advanced lossless and lossy compression methods, and transactional and vector databases. You will collaborate with technical experts to analyze and optimize data-intensive workloads for heterogeneous GPU/CPU architectures, influence the design of next-generation hardware and software, and work with NVIDIA's largest customers and CSPs to integrate solutions and influence open standards.

Requirements

Masters or PhD in Computer Science, Computer Engineering, Applied Math and/or related computationally focused science degree (or equivalent experience).
At least 5+ years of relevant work or research experience, with a track record in state-of-the-art systems or complex projects, involving cross-team collaboration and solid prioritization skills.
Hands-on experience with low-level parallel programming across execution units (CPU/GPU/NPU/ASICs), e.g., CUDA, ROCm, Metal, OpenACC, OpenMP, MPI, pthreads, TBB, etc.
Fluency in C/C++, algorithms and data structures.
CPU/GPU/NPU accelerators architecture fundamentals, memory subsystem, caches, NICs and storage I/O.
Domain expertise in data processing, compression and decompression, codecs or in high performance distributed databases, ETL and data analytics.

Nice To Haves

PhD or a recent project/publication in a relevant field.
Background in compression (lossless/lossy, ANS, Bitpack), video or image codecs (H.264, H.265, AV1, ProRes), low-latency data analysis, storage systems, networking, and distributed computer architectures.
Track of records in zero-to-one project or initiatives, spanning several stakeholders and resulting in substantial TCO gains or enabling new workflows.
Open-source contributions or committee participation in the related domain and fields.
Excellent interpersonal skills, problem solving, and the ability to communicate efficiently in sophisticated technical scenarios.

Responsibilities

Prototype and integrate novel approaches to GPU-accelerated distributed data processing domains: dataframe analytics, high-throughput low-latency advanced lossless and lossy compression methods, transactional and vector databases.
Perform in-depth analysis and optimization of complex data intensive workloads to ensure the best possible performance of current heterogeneous GPU/CPU architectures.
Influence the design of next-generation hardware architectures, software, and programming models in collaboration with research, hardware, system software, libraries, and tools teams at NVIDIA.
Work directly with NVIDIA's largest customers and CSPs to integrate solutions at Speed-Of-Light, and influence open standards in data analytics and compression.