Senior CPU RTL Design Engineer

Intel Corporation•Austin, TX

1d•$141,910 - $269,100•Hybrid

About The Position

Join Intel's CPU Design Team and help shape the future of energy-efficient, high-performance computing. As a Senior CPU RTL Design Engineer, you will define, develop, and optimize key microarchitectural features that power Intel's next-generation processors. In this role, you will contribute to CPU architecture and microarchitecture development, create high-quality RTL designs, and drive power, performance, area, and timing optimizations. Working closely with architecture, verification, physical design, and SoC integration teams, you will help deliver innovative processor technologies that advance Intel's leadership in computing. This position offers the opportunity to solve complex technical challenges, influence CPU design decisions, and contribute to products that impact millions of users worldwide.

Requirements

Bachelor's degree in Electrical/Computer Engineering, Computer science or related STEM degree with 7+ years of relevant experience. Or a Master's degree in the same filed with 5+ years of experience.
7+ years of experience in RTL design using System Verilog, with strong knowledge of hardware modeling and logic debug environments.
5+ years of experience with energy-efficient and low-power logic design methods, including techniques applicable to high-frequency optimization.
5+ years of experience in Clock-domain crossing (CDC), and Power-aware design.
3+ years of experience in scripting languages such as TCL, Perl, or Python.

Nice To Haves

A PhD in the same fields with 2+ years of experience.
Knowledge on CPU power-management namely power/electrical budgeting, dynamic voltage and frequency scaling, thermal, P/C states and reset sequence handling.
Comprehensive knowledge of Intel Architecture ISA and system architecture, including x86 assembly language.
Experience with high-speed circuit design and optimization, specifically for datapath, circuits, and arrays.
Familiarity with circuit planning and timing convergence processes.
Ability to leverage broad understanding of CPU architecture to deliver impactful solutions.
Proficient with static timing analysis, UPF and lint checks.

Responsibilities

Develop and optimize logic design, register transfer level (RTL) coding, and simulation for the CPU.
Participate in defining the architecture and microarchitecture features of the CPU design.
Write RTL and optimize logic for power, performance, area, and timing goals.
Ensure design integrity for physical implementation through effective strategies, tools, and methods.
Review verification plans to ensure design features are correctly validated and resolve failing RTL tests.
Document microarchitectural specifications (MAS) for the CPU features.
Collaborate with SoC customers to ensure seamless integration and high-quality performance of the CPU block.