Senior ASIC/FPGA Design Engineer

RTXMcKinney, TX
$86,800 - $165,200Onsite

About The Position

At Raytheon, the foundation of everything we do is rooted in our values and a higher calling – to help our nation and allies defend freedoms and deter aggression. We bring the strength of more than 100 years of experience and renowned engineering expertise to meet the needs of today’s mission and stay ahead of tomorrow’s threat. Our team solves tough, meaningful problems that create a safer, more secure world. The selected candidate will define ASIC/FPGA requirements from system specifications, develop digital architectures, implement RTL designs, and perform timing, power, and functional analysis. They will integrate and verify FPGA modules in a lab environment using industry‑standard simulation, emulation, and hardware test tools. The candidate will work closely with cross‑functional engineering teams, support design reviews and documentation, and follow established development processes. This is an onsite role based in McKinney, TX.

Requirements

  • Typically requires a Bachelor of Science degree in a STEM field (Science, Technology, Engineering, Mathematics).
  • 5+ years experience in FPGA/ASIC design, RTL development, and verification
  • Experience with Xilinx/Altera FPGAs or other related devices
  • Experience with digital design and high‑speed interfaces (PCI/PCIe, VPX, Gb Ethernet, Ienterlaken)
  • Experience with debug capability and scripting proficiency (Python, Perl, Shell)
  • The ability to obtain and maintain a U.S. government issued security clearance post-start is required.
  • U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance.

Nice To Haves

  • Experience in advanced FPGA design and development
  • Experience with ASIC design and development processes
  • Experience with System Verilog and UVM verification methodologies
  • Experience with embedded software development and firmware–hardware integration
  • Experience using MATLAB for modeling, analysis, or algorithm development

Responsibilities

  • Define ASIC/FPGA requirements from system specifications
  • Develop digital architectures
  • Implement RTL designs
  • Perform timing, power, and functional analysis
  • Integrate and verify FPGA modules in a lab environment using industry‑standard simulation, emulation, and hardware test tools
  • Work closely with cross‑functional engineering teams
  • Support design reviews and documentation
  • Follow established development processes

Benefits

  • medical
  • dental
  • vision
  • life insurance
  • short-term disability
  • long-term disability
  • 401(k) match
  • flexible spending accounts
  • flexible work schedules
  • employee assistance program
  • Employee Scholar Program
  • parental leave
  • paid time off
  • holidays
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