Senior ASIC Engineer

Qualcomm • Santa Clara, CA

5d • $126,700 - $190,100

About The Position

Qualcomm Atheros, Inc. is seeking a Senior ASIC Engineer to join their Engineering Group. This role involves owning block-level verification for wireless connectivity designs, meeting coverage goals, and developing comprehensive verification strategies. The engineer will work with cross-functional teams for integration verification and collaborate with the design team to understand specifications and create quality verification test plans.

Requirements

• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
• OR Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
• OR PhD in Science, Engineering, or related field.
• 2+ yrs. of ASIC Verification experience
• 1+ yrs. of working experience in UVM
• Experience with scripting languages.
• Experience with building at least one test bench using UVM from scratch
• Good amount of experience in Digital Logic design techniques, SoC architecture, including ARM CPUs, communications peripherals, multi-domain clocking, power management, AMBA bus protocols such as AHB and AXI
• Strong in problem solving
• Strong team player and communicator

Nice To Haves

• Knowledge of low power, processor verification and GLS flows is plus point
• Experience with testbench automation, industry standard bug tracking, and regression mechanisms, code and functional coverage-driven verification closure and be able to set up and deploy verification strategies based on directed testing, randomization, assertions, and architectural performance testing to achieve coverage.

Responsibilities

• Own block level verification for wireless connectivity designs and meet coverage goals
• Own the test-bench, coding guidelines, best practices and enable reuse of block level UVM test-benches at chip level.
• Come up with a comprehensive verification strategy encompassing simulations, formal verification, HW/SW reuse and simulation performance.
• Work with cross functional IP teams for Integration verification
• Work with design team to understand Spec and come up comprehensive test plan for quality Verification

Benefits

• Competitive annual discretionary bonus program
• Opportunity for annual RSU grants
• Highly competitive benefits package designed to support your success at work, at home, and at play.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior