Senior ASIC Design Engineer

NVIDIA•Santa Clara, CA

2d•Hybrid

About The Position

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. We are looking for an Senior ASIC Design Engineer to join our Circuit Solutions Group! In this position, you'll make a real impact in a dynamic, technology-focused company. Your work will affect product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We've crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the computing platforms of tomorrow. Are you ready to accelerate your career with us?

Requirements

BS (or equivalent experience) in Electrical Engineering, Computer Engineering, or a related degree required; advanced degrees (MS, PhD) are a plus.
3+ years of relevant proven experience and a background in logic design, Verilog and/or System-Verilog with a deep understanding of physical design and VLSI.
Experience with multiple clock domains and asynchronous interfaces.
Exposure to Digital Systems design and computer architecture.
Programming skills in PERL or Python.
Excellent communication skills and interpersonal skills are required.

Nice To Haves

Experience with all stages of ASIC design flow including front end design and verification, DFT, timing analysis, ECO, ATE test development, post-si bringup & debug.
Good understanding of behavioral real number modeling and low level digital or mixed signal design concepts.
Strong knowledge or work experience in Mixed signal and custom designed IPs solutions.
Proficiency in scripting language, such as, Perl, Tcl, Make files and automation methods/algorithms a certain plus.

Responsibilities

Responsible for the micro-architecture and digital design implementation of various innovative IPs for hardware security, clocking, voltage regulation and silicon correlation.
Collaborate with Architects, Circuit Designers and Verification engineers to deliver a world-class and next-generation solution.
Develop scalable RTL designs, execute synthesis and perform timing analysis using innovative CAD tools and the latest process technologies in the industry.
Work on functional verification, perform CDC checks and formal equivalence.
Support post-si bringup and debug activities.
Develop and craft tools and flows including Agentic AI flows as necessary in support of design activities.