Semiconductor Test and Assembly Senior Engineering Manager 3
About The Position
Northrop Grumman Mission Systems’ Microelectronics Center is hiring a Semiconductor Test and Assembly Senior Engineering Manager for its Advanced Technology Lab outside Baltimore, Maryland. The lab designs, manufactures, and tests semiconductor products for internal and commercial production customers and emerging technology programs. Its foundry supports production microelectronic devices made from silicon, gallium arsenide, gallium nitride, and silicon carbide, as well as technology development. ATL’s work spans semiconductor technology, including design, mask making, wafer fabrication, and test and assembly of internal wafers and outsourced devices in multiple form factors. Reporting directly to the Director of ATL, this manager of managers is accountable for technical, management, and customer activities related to foundry semiconductor device assembly and test at wafer, die, and package levels. The role works with ATL groups such as Program Management, Product Engineering, Test and Assembly operations and planning, and Wafer Process Integration, as well as customer and partner Design Engineering and Program groups. The position supports production, research and development, long-term programs, and new programs for future military platforms. The manager sets technical direction and oversees execution; leads staffing, employee tasking, performance, development, and succession planning; and oversees project management, budgets, capital planning, and program and engineering interfaces. The role ensures delivery, quality, and compliance with customer and regulatory requirements; improves processes and procedures; and develops organizational growth strategies and goals. The manager collaborates across functions to meet schedule, cost, and quality requirements, works with customers to shape the technology roadmap and identify funding opportunities, and supports sales efforts to achieve the Annual Operating Plan. Relocation assistance may be available. Travel is 10% of the time. A clearance is not required to start, but the candidate must be able to obtain and maintain a Secret Clearance.
Requirements
- Bachelor’s degree in Engineering or Science and at least 10 years of related experience in semiconductor operations, manufacturing, engineering, and/or program management; alternatively, a Master’s degree and at least 6 years of related experience.
- At least 10 years in relevant leadership or functional management roles.
- Strong technical background in microelectronics test (RFIC, digital and analog, mixed signal, and high-power RF amplifiers) and assembly engineering disciplines (wafer dicing and sorting, die attach, wire bonding, lidding, and reliability testing).
- Ability to set priorities, communicate clearly, be resourceful and customer-focused, and uphold ethics and integrity.
- Ability to balance cost, schedule, and quality while fostering innovation and positive employee relations.
- Ability to clarify organizational priorities, manage external pressures, and execute complex project plans and initiatives.
- Skill in negotiating technical scope and schedules with technical and non-technical collaborators.
- Strong business and financial acumen.
- Strong knowledge of MS Office (Word, Excel, PowerPoint, and SharePoint) and Atlassian tools (JIRA and Confluence).
- U.S. citizenship required.
- Ability to obtain and maintain a Secret Clearance.
Nice To Haves
- 12 years of relevant experience.
- Master’s or Ph.D. degree in Engineering or Science.
- Advanced expertise in multiple areas of semiconductor device process and characterization technologies, especially those relevant to test and assembly.
- Advanced experience with manufacturing excellence, Lean/Six Sigma, and Agile methodologies.
- Experience capturing new business through cross-functional collaboration.
- Effectiveness in managing customer relationships, prioritization, and delegation.
- Strong interpersonal, critical thinking, and presentation skills, with the ability to communicate across all organizational levels.
- Active Secret or Top-Secret Clearance.
Responsibilities
- Define technical direction and oversee execution across semiconductor test and assembly engineering at wafer, die, and package levels.
- Manage staffing, employee tasking, performance, development, and succession planning.
- Lead project management, budget oversight, capital planning, and program and engineering interface activities.
- Ensure on-time delivery, quality, and compliance with customer and regulatory requirements.
- Drive continuous improvement of internal processes and procedures, and define and execute organizational growth strategies and goals.
- Collaborate with cross-functional partners to deliver products to schedule, cost, and quality requirements, including implementing approaches that reduce costs and increase productivity.
- Work with internal and external customers to shape the technology roadmap, identify and secure funding opportunities, and support sales efforts to achieve the Annual Operating Plan.
Benefits
- Health insurance coverage
- Life insurance
- Disability insurance
- Savings plan
- Company-paid holidays
- Paid time off (PTO) for vacation and/or personal business
- Potential eligibility for overtime, shift differential, and discretionary bonus, depending on position
Stand Out From the Crowd
Upload your resume and get instant feedback on how well it matches this job.
What This Job Offers
Job Type
Full-time
Career Level
Senior
