Semiconductor Packaging Component Quality Engineer
About The Position
The Component Quality and Technology (CQT) organization is seeking a detail-oriented and proactive Semiconductor Packaging Component Quality Engineer to be our technical expert in ensuring the highest standards of component integrity. You will use your deep packaging and board-level expertise to evaluate the quality, reliability, and physical integrity of packaged semiconductor components. We are a global team dedicated to ensuring the highest quality standards. You will work alongside leaders in Quality, Reliability, Component Engineering, and Supply Chain. We pride ourselves on a culture of technical rigor, continuous improvement, and collaborative problem-solving.
Requirements
- Bachelor’s degree in Electrical Engineering, Mechanical Engineering, Materials Science, or a related field.
- 4+ years of experience in semiconductor quality, packaging reliability, or board-level failure analysis.
- Strong understanding of standard IC packaging types (e.g., BGA, QFN, WLCSP, Flip-Chip) and their associated material, mechanical, and thermal stress behaviors.
- Strong working knowledge of JEDEC and IPC standards regarding packaging, reliability testing, and board-level qualifications.
Nice To Haves
- Direct experience designing, setting up, and executing Level 2 (L2) / Board Level Reliability (BLR) testing pipelines, including thermal cycling, mechanical shock/drop testing, board flex testing, and continuous daisy-chain resistance monitoring.
- Proficiency with reliability software (e.g. Reliasoft, Weibull++, Minitab or JMP) and CAD/PCB layout viewers (e.g. Allegro, Altium)
- Familiarity with PCB board design principles, footprint layout constraints, and schematic routing that impact package solder joint reliability.
- Formal training in structured problem-solving methodologies (e.g., 8D, 5-Why, Fishbone analysis, Six Sigma Green/Black Belt).
Responsibilities
- Assess and lead the quality and physical integrity of incoming packaged components from external suppliers.
- Review supplier-provided data or execute BLR/L2 reliability testing to ensure component-to-board interconnect integrity for best outcomes in SMT manufacturing and long-term field use.
- Oversee root-cause analysis on component failures, identifying package-level defects such as delamination, wire bond lifts, die cracking, and solder joint fatigue.
- Partner with external component suppliers and OSATs to audit packaging processes, review manufacturing reliability data, and resolve package-level reliability excursions.
- Evaluate supplier-driven package process changes (PCNs) and determine alignment with internal quality standards.
Benefits
- medical, dental and vision insurance
- a 401(k) plan with a Cisco matching contribution
- paid parental leave
- short and long-term disability coverage
- basic life insurance
- grants of Cisco restricted stock units
- 10 paid holidays per full calendar year
- 1 floating holiday for non-exempt employees
- 1 paid day off for employee’s birthday
- paid year-end holiday shutdown
- 4 paid days off for personal wellness
- 16 days of paid vacation time per full calendar year (non-exempt employees)
- flexible vacation time off program (exempt employees)
- 80 hours of sick time off provided on hire date and each January 1st thereafter
- up to 80 hours of unused sick time carried forward from one calendar year to the next
- Additional paid time away may be requested to deal with critical or emergency issues for family members
- Optional 10 paid days per full calendar year to volunteer
- annual bonuses (for non-sales roles)
- performance-based incentive pay (for sales roles)
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What This Job Offers
Job Type
Full-time
Career Level
Mid Level
