Staff Semiconductor Device Modeling Engineer

Intel Corporation•Santa Clara, CA

4d•$149,600 - $284,580•Hybrid

About The Position

As a Staff Device Modeling Engineer, you will play a pivotal role in advancing circuit simulation and modeling capabilities for next-generation semiconductor technologies. Your daily responsibilities will include collaborating with cross-functional teams to drive the development of high-quality simulation tools and methodologies, ensuring alignment with technology roadmaps, and enabling optimized solutions for process design kits (PDKs). Your contributions will directly impact accelerating product delivery timelines and enhancing Intel's leadership in the foundry space. You will be joining Intel's Design Technology Platform (DTP) organization, a critical pillar that empowers Intel Foundry customers to produce cutting-edge products for the marketplace. The Compact Device Modeling Group (CDMG), within DTP, focuses on co-optimizing Intel's state-of-the-art process technology and design tools to enable the development of innovative, high-performance products. As part of this team, you will contribute to the modeling solutions that allow design teams to deliver leadership products for data-centric applications faster and with greater precision.

Requirements

Bachelor's degree in Electrical Engineering or a related discipline with 6+ years of industry experience in the semiconductor field; -OR- Master's degree in Electrical Engineering or a related discipline with 4+ years of relevant industry experience; -OR- Ph.D. in Electrical Engineering or a related discipline with 2+ years of experience.
2+ years of hands-on experience with compact modeling techniques for advanced nodes such as FinFET and GAAFET.
Proficiency with commercial simulators (e.g., HSPICE, Spectre) and extraction tools (e.g., ICCAP, MBP).
Experience in Python scripting for data analysis and automation.
Experience in statistical modeling, RF simulation, and EM simulation.

Nice To Haves

Ph.D. in Electrical Engineering or a related discipline with 3+ years of industry experience in the semiconductor field.
Strong background in Device physics and RF modeling.
Experience in RF structure design, RF De-embedding and EM simulation.
Experience collaborating across teams and geographies, with experience leading technical initiatives.
Experience with machine learning algorithms and their application in compact model development.
Strong understanding of process flows, circuit design, and simulation methodologies.

Responsibilities

Partner with technology leaders and PDK teams to ensure modeling capabilities align with roadmap requirements.
Drive readiness and validation of simulation and modeling solutions to meet PDK delivery milestones.
Develop compact device models (e.g., FinFET, GAA) for transistor modeling, including layout-dependent effects and circuit performance impacts.
Conduct statistical modeling, simulation, and data analysis using Python scripting and other relevant tools.
Implement innovative methodologies for device targeting benchmarking circuits, self-heating effects, and Open Model Interface (OMI) modeling.
Collaborate across multiple teams and geographies to achieve seamless integration and optimized solutions.