2026 Fulltime - Raytheon RF Digital Design Integration & Test Engineer I (Onsite)

RTX•McKinney, TX

2d•$57,200 - $108,800•Onsite

About The Position

In this role, you will contribute to the design, development, and integration of advanced digital hardware and embedded processing solutions. You will support ASIC digital core and FPGA FW development by implementing and verifying digital architectures, developing models and algorithms in MATLAB, and assisting with system-level integration activities. You will develop and maintain SystemVerilog/UVM verification environments, define and execute verification strategies—including constrained-random testing and coverage closure—and perform design reviews to identify functional and architectural risks early. You will drive pre-silicon validation through simulation, lint, CDC, and STA awareness, and lead post-silicon bring-up and debug in lab environments. You will serve as an Integration & Test lead for ASIC product development, creating test cases and evaluating early hardware performance. This includes analyzing high-speed ASIC behavior using MATLAB and Python scripts, supporting SERDES and other high-speed interfaces, and working with IIC, DAC/ADC IPs. You will debug complex issues spanning ASIC digital cores, FPGA FW, firmware, and hardware systems, and use advanced test equipment such as network analyzers, phase-noise analyzers, and high-speed oscilloscopes. You will calculate key performance parameters such as SINAD, jitter, bit-error rate, and intermodulation products, while developing automation tools using Python and scripting languages to improve regression efficiency and analysis. This role requires close collaboration with design, systems, and hardware teams to deliver robust, high-performance electronic systems.

Requirements

Bachelor's degree in Electrical Engineering or related Science, Technology, Engineering and Mathematics (STEM) major.
The ability to obtain and maintain a U.S. government issued security clearance is required.
U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance.
Experience may be obtained through on‑the‑job experience, research, coursework, or projects.

Nice To Haves

Demonstrated experience through, internships or senior project, in RF measurements, FPGA interface, Integration and Test, Matlab
Familiarity with Xilinx, Altera or Microsemi/Microchip FPGAs.
Experience with ASIC digital core development and FPGA firmware implementation
Familiarity with SystemVerilog and UVM‑based verification environments
Understanding of constrained‑random testing, functional coverage, and verification planning
Knowledge of FPGA validation methods including simulation, lint, CDC, and STA concepts
Hands‑on experience with hardware debugging and laboratory testing
Ability to debug issues spanning ASIC logic, FPGA firmware, embedded firmware, and hardware systems, Windows based PC networking
Experience analyzing high‑speed ASIC or FPGA performance using MATLAB and Python
Knowledge of high‑speed interfaces such as SERDES‑based systems, IIC, and DAC/ADC
Understanding of performance metrics such as SINAD, jitter, BER, and intermodulation
Familiarity with lab instrumentation (e.g., network analyzers, phase‑noise analyzers, high‑speed oscilloscopes)
Ability to create automation tools or analysis scripts in Python or similar scripting languages
Experience collaborating with cross‑functional teams including design, systems, and hardware engineering

Responsibilities

Contribute to the design, development, and integration of advanced digital hardware and embedded processing solutions.
Support ASIC digital core and FPGA FW development by implementing and verifying digital architectures.
Develop models and algorithms in MATLAB.
Assist with system-level integration activities.
Develop and maintain SystemVerilog/UVM verification environments.
Define and execute verification strategies, including constrained-random testing and coverage closure.
Perform design reviews to identify functional and architectural risks early.
Drive pre-silicon validation through simulation, lint, CDC, and STA awareness.
Lead post-silicon bring-up and debug in lab environments.
Serve as an Integration & Test lead for ASIC product development, creating test cases and evaluating early hardware performance.
Analyze high-speed ASIC behavior using MATLAB and Python scripts.
Support SERDES and other high-speed interfaces.
Work with IIC, DAC/ADC IPs.
Debug complex issues spanning ASIC digital cores, FPGA FW, firmware, and hardware systems.
Use advanced test equipment such as network analyzers, phase-noise analyzers, and high-speed oscilloscopes.
Calculate key performance parameters such as SINAD, jitter, bit-error rate, and intermodulation products.
Develop automation tools using Python and scripting languages to improve regression efficiency and analysis.
Collaborate with design, systems, and hardware teams to deliver robust, high-performance electronic systems.