RF/Analog IC Design Engineer

Qualcomm•Santa Clara, CA

About The Position

Define, design and develop complex radio frequency integrated circuits in complex SoC’s and discrete RFIC’s. Perform radio signal path and circuit topology analysis and detailed transistor-level design of highly-integrated transceivers and associated blocks for wireless applications, 4G, 5G, WLAN, BT and GPS standards using advanced process technologies. Utilize complex analysis, simulation, engineering, science and mathematical principles to compose algorithm structures to solve problems. Assess processing requirements and select devices to meet requirements. Debug and assess performance of algorithms in actual application hardware.

Requirements

Bachelor's degree in Electrical Engineering with 3+ years of experience with designing RF/Analog circuits for wireless products (e.g., LNA's, PLL's) and 2+ years of ASIC design, verification, or related work experience.
Master's degree in Electrical Engineering or related field and 2+ years of ASIC design, verification, or related work experience.
PhD in Electrical Engineering or related field.
2+ years of academic or professional experience using two or more of the following software: CADENCE, Virtuoso, ADS.

Nice To Haves

3+ years experience in the transistor level design of RF analog integrated circuits with a Master's degree in Electrical Engineering.
Ph.D. in Electrical Engineering with internship or publication.
3+ years of experience in one or more of the following areas: Design of receiver and transmitter RF/Analog circuits, Design of high-performance RF frequency synthesizers, Digital control and signal processing, Product experience from conception, design, and product commercialization, Electro Magnetic simulation/modeling.
1+ year of experience working in a large matrixed organization.
1+ year of work experience in a role requiring interaction with senior leadership (e.g., Director and above).

Responsibilities

Determines circuit-level specifications based on system-level requirements with minimal supervision.
Uses technical expertise with tools/applications to develop the architecture and design of one or more blocks based on specifications.
Resolves architecture and design problems by applying sound RFIC engineering practices with minimal supervision.
Runs simulations to determine how circuits perform under various circumstances with minimal supervision.
Independently floor-plan layout; works with layout engineers under minimal guidance to generate the layout of circuits and conduct physical verification on the layout; participate in review of generated layout.
Writes test plans and reviews test results to assess performance and identify any bugs in own work and provides instructions to test engineers for their design block.
Debugs most issues and escalates highly complex issues.
Seeks essential knowledge of industry trends, and advances related to RFICs.
Collaborates with team members to generate new ideas.
Writes clear and detailed technical documentation and feature descriptions to guide users.