R&D Process Development Engineer

TTM•Eau Claire, WI

4d•Onsite

About The Position

The R&D Process Development Engineer is a highly technical individual contributor responsible for developing, characterizing, optimizing, and scaling advanced manufacturing processes associated with Semi-Additive Plating (SAP) build up technology. Familiarity with Semi-Conductor or Fan-Out Wafer Level Packaging FOWLP process techniques is a plus as line and space characteristics are approaching historic Integrated Circuit sizes. Need for R&D engineering across four critical PCB fabrication disciplines: Mechanical Processing, Lithography, Electroplating, and Etching. This role sits at the intersection of materials science, chemistry, precision engineering, and manufacturing — requiring both deep scientific rigor and practical manufacturing instincts. This individual is expected to be the recognized technical authority within their focus areas — able to think outside of the standard and come up with solutions to complex problems, evaluate and set up new equipment and derive processes around those tools to achieve intended results. This role requires someone equally comfortable running-controlled experiments in a laboratory and developing processes on small scale production manufacturing equipment— someone who bridges the gap between science and production with clarity, confidence, and technical credibility.

Requirements

Bachelor of Science in Chemical Engineering, Materials Science, Chemistry, Mechanical Engineering, or closely related discipline.
3–8 years of hands-on process engineering experience in PCB manufacturing, or a closely related wet chemistry/precision manufacturing environment.
Direct, hands-on experience with at least two of the four focus areas: Mechanical, Lithography, Electroplating, or Etching.
SAP: Fundamentals of SAP Build up or FOWLP technology including hands on experience.
General: SPC, Design of Experiments (DoE), Cpk/Ppk analysis, failure analysis methodologies (SEM/EDS, optical microscopy, ICP-MS, XRF, FTIR), IPC standards (IPC-A-600, IPC-6012, IPC-TM-650, IPC-4552), ERP/MES systems, CAM software (Genesis, CAM350), SEMI Standards.
Must comply with TTM Export Control Policies and Procedures and all applicable laws including ITAR, EAR and OFAC including but not limited to: a) being able to identify ITAR product on the manufacturing floor and understand that access to these products and related technical data is restricted to only US Citizens and US Permanent Residents; b) recognition of Foreign Person visitors by badge differentiation; c) understand and follow authorization procedures for bringing foreign visitors into facilities (VAL); d) understand the Export and ITAR requirements for shipments leaving the US; e) manage vendor approvals for ITAR manufacturing and services.

Nice To Haves

Master or PhD of Science in Chemical Engineering, Materials Science, or Electrical Engineering with a focus on electronic materials or manufacturing.
Experience in semiconductor fab or FOWLP.

Responsibilities

Semi-Additive (SAP) Build-up Process Development
Equipment definition, purchase, setup and qualification for R&D.
Develop technology that can be scaled to provide solutions to customers across TTM’s markets.