Lead Product Engineer

Cadence Design Systems•San Jose, CA

About The Position

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Join Cadence’s Digital and Signoff Group (DSG) as a Product Engineer, where you will act as the vital bridge between R&D, Application Engineering, and our global customers. In this high-impact role, you will influence the next generation of chip design software, helping industry leaders solve complex physical design challenges at 7nm and below.

Requirements

BS in Electrical Engineering (EE) + 4 or more years of industry experience, OR MS in Electrical Engineering (EE) + 2 or more year of digital implementation experience.
Deep understanding of the full ASIC design flow (RTL-to-GDSII) with a focus on physical design and timing analysis.
Proven hands-on experience with timing closure and PPA optimization at 7nm, 5nm, or below.
High familiarity with industry-standard EDA tools for synthesis, placement, routing, and signoff.
Proficiency in Tcl, Python, or Perl (familiarity with AI-driven productivity tools is a major plus).
Strong verbal and written skills to translate complex technical issues into actionable solutions.

Nice To Haves

familiarity with AI-driven productivity tools is a major plus

Responsibilities

Serve as the primary place-and-route (P&R) resource for internal development teams and external customers.
Collaborate with R&D to track, diagnose, and resolve software issues, ensuring a robust tool release cycle.
Execute competitive benchmarks to demonstrate Cadence’s edge in Power, Performance, and Area (PPA).
Develop and deploy customized RTL-to-GDSII methodologies and scripts to meet specific customer design goals.
Partner with Product Marketing to align technical capabilities with market needs and customer roadmaps.