Product Development Engineer

Altera•San Jose, CA

2d•$106,200 - $153,000•Onsite

About The Position

As a Product Development Engineer at Altera, you will play a critical role in bringing next-generation FPGA products from development into high-volume manufacturing by driving thermal characterization, system-level validation, and product performance optimization. In this role, you will develop and execute thermal characterization plans to evaluate device performance, reliability, and power behavior across operating temperature ranges, while performing detailed thermal and electrical characterization of FPGA products to correlate silicon measurements against design expectations and simulation models. You will analyze characterization data to identify performance limitations, validate thermal specifications, and drive improvements across silicon design, package technology, cooling solutions, and manufacturing processes. In addition, you will lead the development and execution of System Level Test (SLT) methodologies to establish correlation between manufacturing test results and golden system-level performance, helping close tester-to-system performance gaps and optimize production test guardbands. This is a highly cross-functional role that partners closely with design, test, product engineering, packaging, manufacturing, and reliability teams to ensure Altera’s FPGA products meet performance, quality, and manufacturability targets at scale.

Requirements

Bachelor’s degree in Electrical Engineering, Computer Engineering, Physics, or a related technical field with 4+ years of experience in product engineering, silicon validation, product development, or semiconductor characterization.
4+ years of experience with thermal and/or electrical characterization of semiconductor devices, including developing and executing characterization plans, collecting silicon data, and analyzing results across operating conditions.
Experience correlating silicon measurements with design expectations, simulation models, or product specifications to validate device performance, power, and reliability behavior.
Experience with system-level test, production test, or post-silicon validation methodologies, including analyzing test data to improve correlation between manufacturing test results and real system-level performance.

Nice To Haves

Experience working with FPGA, ASIC, or other complex semiconductor products in a product engineering, validation, or characterization environment.
Experience with thermal test methods, temperature chamber testing, and silicon performance characterization across voltage and temperature corners.
Knowledge of semiconductor manufacturing test flows, SLT, ATE correlation, guardband optimization, or yield/performance analysis.
Experience analyzing electrical, thermal, or performance data to identify trends, root cause issues, and drive product or test improvements.
Scripting and data analysis experience using Python, Perl, MATLAB, or similar tools to automate test execution and analyze characterization data.
Strong cross-functional communication skills with the ability to work effectively across design, test, manufacturing, packaging, and product engineering teams.

Responsibilities

Develop and execute thermal characterization plans to evaluate device performance, reliability, and power behavior across operating temperature ranges.
Perform thermal and electrical characterization of FPGA products, including correlation of silicon measurements against design and simulation models.
Analyze thermal characterization data to identify performance limitations, validate thermal specifications, and drive design, package, cooling, and manufacturing improvements.
Develop and execute System Level Test (SLT) methodologies to establish correlation between manufacturing test results and golden system-level performance, driving closure of tester-to-system performance gaps and optimization of production test guardbands.
Develop and implement DFT strategies for FPGAs, including scan insertion, BIST (Built-In Self-Test), and test compression techniques.
Collaborate with RTL design and verification teams to ensure testability features are embedded efficiently.
Define and implement test plans, patterns, and fault models to ensure optimal test coverage and yield.
Develop and maintain ATPG (Automatic Test Pattern Generation), MBIST, and other manufacturing test content flows and scripts.
Perform pre-silicon test pattern simulation and validation to ensure test effectiveness prior to tape-out.
Analyze test results, debug silicon failures, and provide root cause analysis.
Work with manufacturing and test teams to optimize test time, cost, and quality.
Analyze early customer returns with emphasis on driving test hole closure activities.
Drive test time reduction through analysis of fallout data versus test time for various IPs to balance and drive overall product cost optimizations.
Stay updated with industry trends and emerging DFT/test technologies.